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With its low attenuation and high directivity, the 77 ~ 110 GHz (W-band) frequency range is suitable for long-distance broadband applications. Although only 77 GHz and 94 GHz have been used for vehicular radar and military surveillance so far, the W-band spectra is destined to play an even important role in the post-5G era. This manuscript describes our development on the 40 nm-CMOS W-band phase shifter design where 5 bits are used for phase shift of 11.25° while additional 4-bit logics are for fine-tuning purpose. The input signal is first be amplified by a wideband amplifier and then transformed through poly-phase circuit into I/Q signals, whose magnitude will then be altered by the following digital VGAs. By making the vector sum at the output, phase shifting in the range of 0° ~ 360° can be obtained and the resolution is 11.25°.

Learning science concepts can be challenging as these concepts are usually abstract and complex. Science visualization and analogies are applied in teaching practices for improving students' understanding of the concepts. This study seeks to promote students' learning performance and flow engagement by integrating visual representation as scaffoldings with game elements. An electric potential gamified teaching activity based on CSLS teaching model (Card-game, Slide, and Learning Sheet gamification teaching model) was proposed and evaluated [1]. The results indicate that the proposed teaching activity could improve students understanding. In the meantime, students generally possessed positive perception toward the game and were having positive flow experiences. Implication and suggestion for future study is discussed based on the findings.

This paper describes our progress in designing the K-band receiver in WIN 0.15μm GaAs pHEMT process. The LNA contains three stages of common-source transistors, and its noise performance has been optimized over the intended bandwidth; the following mixer is made of single-balanced transistors where the edge-coupled Marchand balun provides the required 18∼26GHz differential-mode LO while active balun is used for combining the 8GHz IF signals. The conversion gain measured on-wafer at room temperature is around 20dB and the noise temperature is close to 300K, with overall power consumption 140mW, and the chip area is 1000×2500μm2. A close inspection on the wide-IF-band noise measurement procedure is also provided where the impact of conversion gain on the measured Tn is explored. This receiver circuit will facilitate the construction of large focal plane arrays where compact cryogenic receiver module is in urgent demand.

This paper describes our progress in the design of cryogenic LNAs using OMMIC 70nm mHEMT for the Square-Kilometer-Array (SKA) project and the Shanghai 65-Meter radio-astronomical telescope. Different LNAs covering the aggregate 1∼40GHz frequency range are designed and measured on-wafer at room temperature, and Tn for the 1∼10, 5∼15, and 10∼40GHz LNAs are 80K, 90K, and 120K, respectively, with the gain all larger than 20dB. One 1∼10GHz LNA chip is then packaged and tested cryogenically, and the noise temperature improvement factor is 6∼8, which is smaller than what can be obtained from the WIN pHEMT. Performance repeatability among different chips has been carried out.

This manuscript describes the Q-band 90nm-CMOS receiver design where the 33∼50GHz RF-LNA, actively-biased double-balanced mixer, 10GHz IF amplifier, wideband frequency tripler and power amplifier in the LO chain are all integrated into one single chip. With overall power consumption of 170mW under 1.2V bias, the measured conversion gain is 15dB, noise figure close to 8dB, input-referred P1dB around −30dBm, and the LO-IF port isolation is more than 60dB. Therefore, it can be easily driven by an external 11∼16GHz signal source and used in applications such as next-generation broadband mobile communications where several specific Q-band frequency points have been considered. However, contrary to most receiver designs where the optimization is carried out over a relatively narrow bandwidth, here the main challenge lies in how to effectively extend the RF, IF, and LO bandwidth simultaneously without rendering performance deterioration. By possessing such broadband RF, IF, and LO characteristics, this Q-band circuit is also eligible for use in radio-astronomical, atmospheric, and other scientific instrumentations.

This manuscript describes a 34–42GHz single-sideband 90nm-CMOS transmitter where PLL has been integrated into the LO chain and, with I/Q input and two-stage up-conversion, a 30dB image-rejection ratio is achieved within the intended bandwidth. This transmitter's wideband tuning range is made possible by the use of additional capacitor on the VCO, and the phase noise of the resulting RF output is in the range of −70 to −90dBc/Hz at 1MHz, and all below −100dBc/Hz at 10MHz. The circuit's IF-to-RF conversion gain is 30dB, with saturated output power around 5dBm, and the total power consumption is 260mW. Through the control of the power amplifier's drain bias, a 50dB power level difference can be obtained, thus allows signal modulation and further combination with the receiver. This 1100×650um2 transmitter can be used as a prototypical circuit to explore next-generation mobile communication and civilian radar array systems.

This paper proposes the wideband active power splitter design where the gain cells are arranged in interleaf rather than the conventional parallel style. By reducing the shunt capacitance of the input transmission line, thus extending its bandwidth, the circuit's high-frequency performance can be greatly improved. A DC-40GHz interleaf active power splitter is then designed using 90nm-CMOS process. With 5dB gain, the magnitude and phase imbalance between the two output ports are 0.15dB and 2.6o at 20GHz, and 0.16dB and 14o at 40GHz. The output-port isolation S23 is mostly below −30dB.