317 results on '"Degraeve, R"'
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2. Analysis of TDDB lifetime projection in low thermal budget HfO2/SiO2 stacks for sequential 3D integrations
3. Dedicated ICs for the Characterization of Variability and Aging Studies and their Use in Lightweight Security Applications : Invited paper
4. A new methodology for modeling Air-Gap TDDB
5. Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery
6. Threshold switching in a-Si and a-Ge based MSM selectors and its implications for device reliability
7. Modeling and spectroscopy of ovonic threshold switching defects
8. Understanding of Tunable Selector Performance in Si-Ge-As-Se OTS Devices by Extended Percolation Cluster Model Considering Operation Scheme and Material Design
9. SOT-MRAM Based Analog in-Memory Computing for DNN Inference
10. Quantitative 3-D Model to Explain Large Single Trap Charge Variability in Vertical NAND Memory
11. Endurance improvement of more than five orders in GexSe1-x OTS selectors by using a novel refreshing program scheme
12. Composition Optimization and Device Understanding of Si-Ge-As-Te Ovonic Threshold Switch Selector with Excellent Endurance
13. Application of Single Pulse Dynamics to Model Program and Erase Cycling-Induced Defects in the Tunnel Oxide of Charge-Trapping Devices
14. Evidence of filamentary switching and relaxation mechanisms in GexSe1-xOTS selectors
15. Gait identification using stochastic OXRRAM-based time sequence machine learning
16. OxRRAM-Based Analog in-Memory Computing for Deep Neural Network Inference: A Conductance Variability Study.
17. Low Voltage Transient RESET Kinetic Modeling of OxRRAM for Neuromorphic Applications
18. Temporal sequence learning with a history-sensitive probabilistic learning rule intrinsic to oxygen vacancy-based RRAM
19. Impact of self-heating on reliability predictions in STT-MRAM
20. Monolithically integrated 1 TFT-1RRAM non-volatile memory cells fabricated on PI flexible substrate
21. Opportunities and Challenges of Resistive RAM for Neuromorphic Applications
22. A multi-bit/cell PUF using analog breakdown positions in CMOS
23. Investigation of the endurance of FE-HfO2 devices by means of TDDB studies
24. Experimental and theoretical verification of channel conductivity degradation due to grain boundaries and defects in 3D NAND
25. Design-technology co-optimization for OxRRAM-based synaptic processing unit
26. Impact of processing and stack optimization on the reliability of perpendicular STT-MRAM
27. Impact of discrete trapping in high pressure deuterium annealed and doped poly-Si channel 3D NAND macaroni
28. Physically unclonable function using CMOS breakdown position
29. Statistical investigation of the impact of program history and oxide-metal interface on OxRRAM retention
30. Retention, disturb and variability improvements enabled by local chemical-potential tuning and controlled Hour-Glass filament shape in a novel W\WO3\Al2O3\Cu CBRAM
31. Channel and near channel defects characterization in vertical InxGa1-xAs high mobility channels for future 3D NAND memory
32. Quantitative model for post-program instabilities in filamentary RRAM
33. Semi-empirical interconnect resistance model for advanced technology nodes: A model apt for materials selection based upon test line resistance measurements
34. Intrinsic program instability in HfO2 RRAM and consequences on program algorithms
35. MOVPE In1−xGaxAs high mobility channel for 3-D NAND memory
36. Programming-conditions solutions towards suppression of retention tails of scaled oxide-based RRAM
37. Statistical poly-Si grain boundary model with discrete charging defects and its 2D and 3D implementation for vertical 3D NAND channels
38. Engineering of a TiN\Al2O3\(Hf, Al)O2\Ta2O5\Hf RRAM cell for fast operation at low current
39. The defect-centric perspective of device and circuit reliability — From individual defects to circuits
40. Quantitative endurance failure model for filamentary RRAM
41. Understanding the impact of programming pulses and electrode materials on the endurance properties of scaled Ta2O5 RRAM cells
42. Tailoring switching and endurance / retention reliability characteristics of HfO2 / Hf RRAM with Ti, Al, Si dopants
43. Lateral and vertical scaling impact on statistical performances and reliability of 10nm TiN/Hf(Al)O/Hf/TiN RRAM devices
44. Role of the Ta scavenger electrode in the excellent switching control and reliability of a scalable low-current operated TiN\Ta2O5\Ta RRAM device
45. Laser thermal anneal of polysilicon channel to boost 3D memory performance
46. Guidelines for reducing NBTI based on its correlation with effective work function studied by CV-BTI on high-k first MOS capacitors with slant-etched SiO2
47. Defects characterization of Hybrid Floating Gate/Inter-Gate Dielectric interface in Flash memory
48. Hourglass concept for RRAM: A dynamic and statistical device model
49. Stacked-etch induced charge loss in Hybrid Floating Gate cells using high-κ Inter-Gate Dielectric
50. Engineering of Hf1−xAlxOy amorphous dielectrics for high-performance RRAM applications
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