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This article presents a new three-phase five-level converter topology with a single dc source. The proposed topology combines the features of the conventional flying capacitor multicell and diode-clamped multilevel topologies. An important advantage of the proposed topology is the reduced volt-ampere, and hence, the volume, of the flying capacitors in its structure while keeping the same voltage blocking capability for semiconductor switches. The appropriate modulation strategy along with the flying capacitor voltage balancing technique is presented. To show the advantages of the proposed converter, different performance criteria such as switch count and rating, volt-ampere of flying capacitors, component cost, losses, and switching frequency are compared with some existing five-level topologies with a single dc source and the same voltage rating of switches. The results indicate that the proposed structure is superior to other five-level converters from different standpoints of the performance criteria. Simulation results are shown to verify the converter operation and its performance. The validity of the theoretical analysis is verified by experimentation on a scaled-down prototype system. [ABSTRACT FROM AUTHOR]

Multisource inverters (MSIs) as a new approach for the integration of the energy and the power sources in electric vehicle applications have gained considerable attraction. Such structures offer the active control of the dc sources without using any dc/dc converters or magnetic elements, which reduces the weight, and the volume of the power electronics interface between the sources and the load. Moreover, high power density and improved efficiency due to the elimination of the magnetics are the other significant features of an MSI. This article proposes a novel three-phase MSI for integration and active control of a high-voltage dc source and a low-voltage dc source. The proposed MSI structure employs a smaller number of semiconductor devices at the current path in various operating modes in comparison to the previously published counterparts, which results in an improved efficiency operation. Performance of the proposed MSI using a modified space vector modulation technique for all possible operating modes is verified through simulations and experiments on a laboratory prototype [ABSTRACT FROM AUTHOR]

The space vector modulation (SVM) scheme is popularly implemented in multilevel converters. However, in flying capacitor-based (FC-based) multilevel converters, it becomes extremely challenging to implement due to the redundancy in phase voltage levels. The intrinsic property of line voltage redundancy of SVM in addition to the phase voltage redundancy of FC-based converters results in considerably increased computational complexity and storage requirements. In fact, one of the most important concerns about FC-based converters is the voltage control of the FCs. This article proposes a generalized decoupled SVM scheme for the FC-based multilevel converters, including the classic flying capacitor multicell (FCM) converters, which is less computationally complex. For balancing the FC voltages, an overall priority index is employed to determine the switching state with the best balancing characteristics. The proposed decoupled SVM scheme along with the capacitor voltage balancing scheme can be implemented intuitively and simply for all FC-based multilevel converters. The simulation results of a five-level FCM converter show the effectiveness of the proposed method in the regulation of FC voltages. Moreover, the proposed voltage balancing method is robust to static load and transient conditions. Also, experimental results demonstrate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This article proposes a four-level single flying capacitor converter (4L-SFCC) topology along with a new modulation technique. The proposed four-level single flying capacitor converter (4L-SFCC) topology has only one flying capacitor in each phase. This results in no redundant switching states associated with each voltage levels, and thus conventional modulation techniques cannot fulfill the capacitor voltage balancing requirement. Therefore, a new modulation technique is also proposed in this article in which the average capacitor current is set to zero during each sampling time, resulting in no net capacitor voltage change and hence voltage balancing during each sampling period. The proposed modulation scheme does not significantly increase the switching frequency and has equal switching frequency for all semiconductor switches, which is an advantage in terms of equalized switching losses. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

This article presents a simple yet effective capacitor voltage balancing method for a five-level nested neutral point clamped (NNPC) converter. The NNPC has been recently developed for medium-voltage high-power applications and has interesting features. This hybrid topology has three flying capacitors in each leg. Like other flying capacitor-based topologies, it is necessary to regulate and balance the voltage of the flying capacitors in an NNPC converter to certain values. In this article, a new approach is proposed to accomplish this task. The proposed regulation technique employs line current direction and voltage deviation of flying capacitors to achieve regulation. The charging/discharging status of flying capacitors with respect to different switching states is used to define a priority index. This index is eventually used to select the proper switching state. A detailed investigation is presented to determine the best switching state for each level of the output voltage. The proposed method does not need any cost function and is very intuitive and simple to implement. Using simulations, the amplitude of the flying capacitor voltage ripple is measured, which shows reduction under all operating conditions. The feasibility and performance of the proposed method are confirmed by using a laboratory-type experimental setup. [ABSTRACT FROM AUTHOR]

This paper presents a generalized topology for multilevel converters based on flying capacitor multicell structure. The proposed topology consists of two modular high-frequency (HF) and low-frequency (LF) sections or cells. The HF cells consist of flying capacitors and semiconductor switches operating at carrier frequency. The LF cells consist of dc sources and semiconductor switches operating at line frequency and its multiples. The proposed topology can be implemented with arbitrary number HF and LF cells. An important advantage of the proposed topology is its reduced components when compared to other multilevel converter topologies in the same family. Another interesting feature is the relatively low blocking voltage requirement for HF switches, making it an attractive choice for high-power applications. A modulating algorithm is devised to generate the gating pulses for the HF and LF cells using phase-shifted carrier-based pulsewidth modulation. As a particular case, the operation of a 25-level topology is explained by the help of illustrating waveforms. A comprehensive comparative study is presented to illustrate the advantages of the proposed topology in terms of the number of components and other performance criteria. Various simulations are carried out to verify the operation of the proposed topology at different operating conditions. The theoretical analysis is experimentally verified using a scaled-down laboratory setup. [ABSTRACT FROM AUTHOR]

This paper presents a new six-level flying capacitor based (FC-based) multilevel converter with one dc source and the capability of operating in all power factors and modulation indexes. Multilevel converters with one dc voltage source are attractive in many applications as they do not need rather expensive and bulky multiwinding input transformer connection at the dc side. On the other hand, not all classic multilevel converters with one dc source can produce any desirable number of output voltage levels at all power factors and/or modulation indexes. In this paper, a hybrid structure is proposed in which six voltage levels can be realized at the ac terminals. The modulation technique and the control strategy for the FC voltage balancing are presented. To show the advantages of the proposed converter, different performance criteria, such as switch count and rating, the size of capacitors, switching frequency, and power losses, are compared with other existing six-level topologies. The results indicate that the proposed structure is superior to other six-level converters from different standpoints. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

This paper presents a new multicell topology based on flying capacitor (FC) structure suitable for multilevel converters. The proposed topology employs the concept of phase-shifted carrier pulse width modulation (PWM) with modified modulating signals to generate appropriate PWM signals. The modulation strategy along with all possible switching states are explained. The implementation of the proposed PWM technique is shown by the help of illustrating waveforms. To show the advantages of the proposed structure, different performance criteria are compared with other FC multicell (FCM) structures. Simulation results are used to further evaluate the potential merits of the proposed topology. It is shown that the proposed structure is superior to other FCM-based structures from different standpoints. Specifically, it reduces the number of high-frequency switches, the number of FCs, and at the same time improves the quality of output voltage. A laboratory-type experimental setup is used to validate the modulation strategy and other theoretical findings. [ABSTRACT FROM AUTHOR]

The capacity for multiterminal secret-key agreement inspires a natural generalization of Shannon’s mutual information from two random variables to multiple random variables. Under a general source model without helpers, the capacity is shown to be equal to the normalized divergence from the joint distribution of the random sources to the product of marginal distributions minimized over partitions of the random sources. The mathematical underpinnings are the works on co-intersecting submodular functions and the principle lattices of partitions of the Dilworth truncation. We clarify the connection to these works and enrich them with information-theoretic interpretations and properties that are useful in solving other related problems in information theory as well as machine learning. [ABSTRACT FROM AUTHOR]

In this paper, a new topology for cascaded multilevel converter based on submultilevel converter units and full-bridge converters is proposed. The proposed topology significantly reduces the number of dc voltage sources, switches, IGBTs, and power diodes as the number of output voltage levels increases. Also, an algorithm to determine dc voltage sources magnitudes is proposed. To synthesize maximum levels at the output voltage, the proposed topology is optimized for various objectives, such as the minimization of the number of switches, gate driver circuits and capacitors, and blocking voltage on switches. The analytical analyses of the power losses of the proposed converter are also presented. The operation and performance of the proposed multilevel converter have been evaluated with the experimental results of a single-phase 125-level prototype converter. [ABSTRACT FROM PUBLISHER]

A new evolutionary algorithm known as the shuffled frog leaping algorithm is presented in this paper, to solve the unit commitment (UC) problem. This integer-coded algorithm has been developed to minimize the total energy dispatch cost over the scheduling horizon while all of the constraints should be satisfied. In addition, minimum up/down-time constraints have been directly coded not using the penalty function method. The proposed algorithm has been applied to ten up to 100 generating units, considering one-day and seven-day scheduling periods. The most important merit of the proposed method is its high convergence speed. The simulation results of the proposed algorithm have been compared with the results of algorithms such as Lagrangian relaxation, genetic algorithm, particle swarm optimization, and bacterial foraging. The comparison results testify to the efficiency of the proposed method. [ABSTRACT FROM PUBLISHER]

We develop new algebraic algorithms for scalar and vector network coding. In vector network coding, the source multicasts information by transmitting vectors of length L, while intermediate nodes process and combine their incoming packets by multiplying them with L\,\times\,L coding matrices that play a similar role as coding coefficients in scalar coding. We start our work by extending the algebraic framework developed for multicasting over graphs by Koetter and Medard to include operations over matrices; we build on this generalized framework, to provide a new approach for both scalar and vector code design which attempts to minimize the employed field size and employed vector length, while selecting the coding operations. Our algorithms also lead as a special case to network code designs that employ structured matrices. [ABSTRACT FROM AUTHOR]