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The package interconnect in integrated electronic components is realized by Interfacial intermetallic compounds (IMC). Meanwhile, the downsizing of µ-bumps to tens of microns in advanced 3D packaging will result in the overgrowth of IMC and the number of grains contained in UBM decreased sharply, which bring new challenge for the reliability of solder joints. For this condition, numerous researches about the growth of IMC generated at the solder/Cu single crystal interface have been reported. For this paper, the growth of IMC at the interface between different solder, i.e., Sn, Sn-2Ag, Sn-3Ag, and (110) Cu single crystal at different temperature, i.e., 230°C, 250°C, 300°C, were investigated. Scanning electron microscope (SEM) and electron backscattered diffraction (EBSD) was used to characterize the morphology and orientation of Cu 6 Sn 5 , respectively. Results shows that the CU 6 Sn 5 formed on (110) Cu exhibit worm type at lower temperature and were tends to transform into facet type at higher temperature. Furthermore, the reflow temperature make a difference in the formation of Cu 6 Sn 5 orientation. Besides, the coarsening rate of CU 6 Sn 5 was promoted following the increase of the Ag. The results have a significant meaning in controlling the orientation and improving the reliability of micro solder joints.

Lead-free solder joints on the traditional Cu substrates usually contain few ${\beta \text{Sn}}$ grains with random orientations. Due to the strong anisotropy of ${\beta \text{Sn}}$ , some common reliability issues of solder joints such as electromigration are related to ${\beta \text{Sn}}$ grain orientations. In this paper, we proved that ${\beta \text{Sn}}$ grain orientations can be effectively controlled using single-crystal Co substrates through adjusting the interfacial ${\alpha \text{CoSn}_{3}}$ morphologies. Two single-crystal Co substrates, ${(11\overline{2}0)\text{Co}}$ and ${(10\overline{1}0)\text{Co}}$ , were used in this study. The textures of interfacial ${\alpha \text{CoSn}_{3}}$ were observed by selective etching. The grain orientations of the interfacial ${\alpha \text{CoSn}_{3}}$ and ${\beta \text{Sn}}$ were examined by electron backscatter diffraction (EBSD). The result indicated that interfacial ${\alpha \text{CoSn}_{3}}$ presented 2 or 4 dominant orientations related to single Co with fixed orientation relationships (ORs). The interfacial atomic mismatches and crystal growth kinetics represented by the angle between the substrate plane and (100) $\mathbf{CoSn}_{3}$ were analyzed to understand the mechanism of the orientation selection of ${\alpha \text{CoSn}_{3}}$ . On ${(11\overline{2}0)\text{Co}}$ , there are only 20 ${\beta \text{Sn}}$ orientations including both single and twinned grains. On ${(10\overline{1}0)\text{Co}}$ , there was no [001]Sn perpendicular to the substrate plane, which ought to improve the reliability of solder interconnections

Microstructures and grain structure evolution of solder joints under extreme temperature changes considerably affects its thermomechanical response and lifetime. Thermal shock tests were conducted to study the thermomechanical responses in Sn-3.0Ag-0.5Cu BGA solder bumps. In this work, the in-situ observation was carried out by EBSD and SEM to examine the microstructure and grain structure evolution during thermal shock tests, which provides the accuracy and continuity of the observation. For the Sn-based solder joint containing limited grains, early failure always occurs in certain solder joints where orientation of grain in contact with substrates exhibited relatively high CTE values parallel to the substrates. Elaborated examination of different stages of recrystallization in the same bump identified localized recrystallization occurred at the place with high CTE mismatch. Moreover, the grain structure had changed from cyclic twin to small random oriented grains, which provides additional degradation mechanism. The grain orientation was critical to reliability and lifetime. Inherent anisotropic properties of s-Sn grain play a vital effect on thermomechanical responses, leading to a change in the initiation propagation path of crack and corresponding reliability problems.

This article considers the propagation of high frequency elastic waves in a polycrystalline material. In this high frequency regime, we assume that the wave ‘sees’ the complex media as a series of locally anisotropic layers with varying thicknesses, where the distribution of layer thicknesses and orientations follow a stochastic (Markovian) process. This leads to a set of stochastic differential equations which describe the statistics of the energy in the system. The material properties are captured by the correlation integral which encapsulates the coupling of length-scales between the random media and the probing wave. Using experimentally obtained EBSD (electron backscatter diffraction) data for an austenitic steel weld, and subsequent processing of the data via a ray based probing technique, this paper reports on how to calculate the correlation integral.

3D electron backscatter diffraction (3D EBSD) was carried out using a Xe-PFIB on CdTe thin film solar cells, with a graded CdSeTe (CST) layer. Devices with different ranges of CST and CdTe thickness were investigated. Grain size, texture, coincident site lattice (CSL) boundaries through the film thickness were revealed by 3D EBSD and the elemental composition of the layers was studied using energy dispersive x-ray spectroscopy (EDS). Results show a reduction of (111) texture intensity and grain size when transitioning from CdTe to the graded (CST) layer. The CST has near randomised texture with weak (001) texture. Analysis of CSL boundaries showed that the CST layer in all devices has a lower frequency of Σ3 grain boundaries relative to other types of grain boundaries with a reduction of 15-22% from the CdTe to the CST layer.

Due to the shrinkage of solder microbumps diameter for higher I/Os, the failure analysis of electromigration (EM) in solder microbumps is more and more important for 3D IC packaging. The non-destructive observation method through 3D X-ray was adopted to study voids formation and necking during EM. A daisy-chain test vehicle with the number of 400 solder microbumps was under current density of $8\times 10^{4}\ \mathrm{A}/\text{cm}^{2}$ at 150 °C. The structure of solder microbump was Cu/Sn2.3Ag/Ni/Cu. With the non-destructive observation method, the evolution of EM failures can be analyzed when the resistance change was 0%, 5%, 10%, and 20%. Therefore, the process of void formation was easily to be discovered through different view angles of computed tomography (CT). However, resolution of 3D X-ray was about a micrometer, destructive analysis of cross-section BEI was done after EM test. By comparison of CT images and BEI, the limitation of CT images could be known. Additionally, some solder microbumps were not damaged seriously due to the effect of Sn grain orientation. Through EBSD analysis, the orientation of Sn grain was measured. The results show that when the c-axis of residual solder was nearly perpendicular to electron current direction, EM damage can be retarded.

The microstructure and microtexture of TC4-DT alloy before and after quasi-β heat treatment are investigated, as well as the influence on the acoustic behaviors of ultrasonic inspection. C-scan ultrasonic images are obtained to investigate the evolution of microstructure confirmed by metallography and electron backscatter diffraction (EBSD) analysis. Noise level and signal-to-noise ratio (SNR) of ultrasonic inspection are also quantitatively verified. The results show that when TC4-DT alloy undergoes quasi-β heat treatment, attenuation and scattering of acoustic energy is significantly different. During this process, the scattering mechanism of acoustic changes from Rayleigh scattering to Phase scattering, which is mainly controlled by the grain size. Under the same scattering mechanism with the uniform average grain size, however, the regions of a-phase crystallites with a certain orientation contribute to the scattering of the acoustic wave. This finding is helpful for estimating ultrasonic inspection ability of large components.

In this paper, the effects of hatch angles on the microstructure and mechanical properties of 316L stainless steel parts fabricated by selective laser melting are studied. In order to further observe the evolution of microstructures and textures, optical microscope (OM), scanning electron microscope (SEM), and electron backscatter diffraction (EBSD) techniques are used to characterize the samples. Finally, TUKON 2100 measuring machine is used to test the Vickers microhardness of different surfaces. The results show the effect of hatch angles on the length and width of the molten pool is not much different. Compared with 0°, the grain still retains the orientation distribution along the building direction (Z-axis), while the orientation feature is more weakened along the direction (X-axis) when the hatch angle is 67°. The hatch angles have a tiny influence on hardness.

Lead-free solder joints based on SnAgCu solders often consist of one single tin grain. Since tin is highly anisotropic, the grain structure in SAC solder joints and the orientation of the tin grain in single-grained solder joints may have a large impact on the fatigue life of the solder joints when exposed to thermomechanical stress.The scope of this study was to evaluate how the grain structure in SAC solder joints to various BGA components is impacted by surface finishes on soldered surfaces, and the volume and composition of the solder. The grain structure was analysed by cross-sectioning of the solder joints and inspected using optical microscopy with cross-polarised light. In addition, some samples were analysed using electron backscatter diffraction in order to determine the orientation of the grains.Four grain structures were observed in the solder joints: single grained, cyclic twin, interlaced twin or mixed cyclic and interlaced twin structure. The surface finish had the largest impact on the grain structure. Solder joints formed between nickel and copper solder finishes had in most cases a high fraction of solder joints with mixed cyclic and interlaced twin grain structure whereas solder joints formed between two nickel finishes had a high fraction of single-grained solder joints.The results from this study indicate that the morphology of the intermetallic layers formed on soldered surfaces is the main factor determining the degree of undercooling during solidification.

The focus of this study is a grain structure analysis of hybrid Cu/SiO 2 wafer-to-wafer bonding interconnects after reliability testing. Hybrid bonding also known as direct bond interconnect is a very promising technology for fine pitch bonding without solder capped microbumps. The elimination of solder enables smaller bonding pitches and smaller interconnect sizes. The main challenge of the hybrid bonding technology is the preparation of a clean Cu/SiO 2 surface with a required Cu dishing. The development of the Cu grain structure after hybrid bonding and after reliability testing was investigated in detail in this study. The wafer-to-wafer stack with Cu interconnects (diameter 4 μm and pitch 18 μm) enclosed by SiO 2 was prepared. This wafer stack was diced into small pieces after successful bonding for further reliability testing. Two types of tests were carried out according to JEDEC standards: temperature shock test at −40°C / +125°C with up to 1000 cycles and isothermal storage at 150°C, 300°C, and 400°C. The resulting microstructure was characterized by scanning electron microscopy (SEM) and electron backscatter diffraction (EBSD). The results show that Cu/Cu interconnects have a {111} texture parallel to the bonding interface that barely changes with reliability testing. EBSD indicates the intergrowth between the Cu grains after the isothermal storage. Significant grain coarsening was found for the isothermal storage at 400 °C in comparison to the state after bonding. The details of the bonding interface (defects and grain boundaries) are presented as well and discussed with regard to recent publications.

The CdCl 2 activation treatment is required for high efficiency CdTe solar cells. The treatment has many effects including increasing grain size and randomizing texture. Increasing grain size should result in higher efficiencies by minimizing grain boundary recombination. The use of metal-oxide layers to replace cadmium sulphide allows higher activation temperatures to be used resulting in larger grain sizes. However, use of these higher temperatures may affect the concentration of chlorine in the grain boundaries. Here we investigate the use of a first high temperature activation on closed space sublimated (CSS) Au/CdTe/TEC12D devices followed by a second optimized cadmium chloride treatment. We report on the effects on texture and grain size. Electron backscatter diffraction (EBSD) has been carried out using a Plasma Focused Ion Beam (PFIB) equipped with spin milling. Initial results indicate that the first higher temperature activation results in larger grains and a randomized texture.

Chlorine is known to have numerous effects on the electronic performance of cadmium telluride (CdTe) solar cells, such as doping the CdTe absorber material and pacifying crystal defects. However the mechanisms by which the element improves device efficiency following the cadmium chloride treatment are still not fully understood. In this work the distributions of chlorine in a high efficiency CdTe device are tracked over large areas and in three dimensions by high resolution dynamic SIMS measurements. The results give new insights into the role of chlorine and defects on the performance of CdTe solar cells, particularly when combined with correlative backscatter diffraction measurements.

With large silicon die size and increased performance demands of computer, graphics, and server applications, the thermo-mechanical stability of the die-level solder bump interconnects are increasingly critical. Since all solder bump interconnects experience a melting and solidification during the package manufacturing and board assembly processes, an initially high residual stress at the interconnection is expected, changing during device operation and aging. Even though solder bumps typically show limited defects at time-zero, characterization of their initial states and the evolution of the stress and strain states are crucial for assessment of potential reliability risks. This study is focused on evolution of the stress and strain levels per solder bump, and their levels of change during various post-treatments including pre-conditioning, high temperature storage, and thermal cycling. For direct stress and strain measurements, electron-backscatter diffraction (EBSD) was used with local mis-orientation and strain contour mapping. EBSD analysis of selected rows of solder bumps at each reliability test condition revealed that initial microstructure plays a major role in the stress and strain development, deformation percentage, grain spread, and local mis-orientation per solder bump. Further, the correlation between the pre-existing micro-voids and the stress state per solder bumps suggests a driving force for possible micro-void migration within the solder bumps.

EDS and EBSD analysis have been developed more than half a century. As of the X-ray and electron detection devices and software is improved much, the detection limit is also improved now.

The development of nano-scale surface finishes over copper pads such as Electroless Palladium and Autocatalytic Gold (EPAG) has been evolved in the recent years due to ever increasing demands in terms of reliability, component miniaturization and signal transmission.Scope of this paper is a full investigation of the layer characteristics and reliability of Electroless Palladium and Autocatalytic Gold. As soldering and bonding are of special interest in the microelectronics industry, the solder joint reliability (SJR) and bonding results will be evaluated. This article will further show the grain characteristics of the intermediate palladium to draw conclusions about its reliability.The palladium layer structure was investigated via electronbackscatter diffraction (EBSD) investigation by means of field emission scanning electron microscopy after preparation with focused ion beam (FIB). The results allow an interpretation of the crystallinity and density of the layer.Increasing I/O counts have led to ever decreasing cross sectional contact areas or, by default, an increase in solder performance expectations. The evaluation of high solder joint reliability demands can be satisfied by high speed shear testing (HSS). For those tests semi-autocatalytic gold was used for activation beneath immersionpalladium. Both pretreated layer systems were compared in their achieved shear energies and therefore SJR.To examine EPAGs bonding abilities the as-received (ASR) mode as well as the aged condition at 175°C for 16h were applied.

In this study we present a newly developed gold-palladium coated copper (EX1R) wire with focus on automotive industry. By using an advanced material composition, halide induced interface corrosion and also sulphur induced pitting corrosion can be prevented sucessfully. Therefore the copper base material was alloyed with further elements to systematically adjust the intermetallics formed at the interface to the pad metallization and to define the microstructure of the copper base material. To show the improved reliability, in a first step three copper bond wires(bare copper wire; palladium coated copperwire (APC) and the new EX1R wire) were bonded to a silicon die with aluminum metallization and a nickel-palladium-gold plated lead frame and encapsulated with chlorine containing mold compound. In a second step, these packages were stressed using a highly accelerated stress test (HAST) and the degradations were analyzed using scanning electron microscopy (SEM). To further compare the new bond wire type with conventional bond wire materials a microstructural analysis of the grain structure using electron backscatter diffraction (EBSD) was carried out on the three copper sample wires. Additionally, the mechanical properties of the samples were investigated by tensile and nanoindentation experiments with the objective to predict interactions between the plastic deformation behavior and chip damage risks during the bond process. The results show that the newly developed gold-palladium coated copper wire shows a much higher reliability compared to the standard wire materials. Furthermore it could be shown that plastic deformation behavior of the new wire type is very similar to that of conventional palladium coated copper wires.

Epitaxial growth of GaN on Si substrates has been regarded as attractive technology to realize low-cost GaN-based optical and electronic devices. With regard to the practical application of GaN-on-Si, fabrication of thick-GaN layer with low-threading dislocation density is one of the most important challenges. In this study, we demonstrate high-quality $> 10\ \mu \mathrm{m}$ -thick GaN-on-Si with low-dislocation density in the order of 107/cm2. By using Si engineered substrate consists of thin Si(111) layer formed on support substrate with the coefficient of thermal expansion (CTE) matched to GaN, the thermal tensile strain generated in the post-growth cooling process has been mitigated. From the EBSD strain analysis, it is confirmed that the strain in the GaN layer is smaller compared with that in the conventional GaN-on-Si. Using this technology, the $30\ \mu \mathrm{m}$ -thick crack-free GaN layer can be achieved without any interlayers. In order to reduce the dislocation, we utilize the dislocation reduction layer contained with multi-stacked SiN nano-masks and GaN islands. As a result, the low-dislocation density of $7\times 10^{7}/\text{cm}^{2}$ in the $10\ \mu \mathrm{m}$ -thick crack-free GaN layer has been achieved. This thick GaN-layer with low-dislocation density have a promise of realizing cost-effective GaN-on-Si based power devices.

Only bulk diffusion occurs in the solder joint of the monocrystalline structure without grain boundary diffusion. The migration direction of intermetallic compounds (IMCs) is mainly determined by grain orientation. Correspondingly, both bulk diffusion and grain boundary diffusion exist in the polycrystalline structure solder joints. The grain boundaries with random orientation and different lengths are distributed in the bumps, which can effectively inhibit the IMCs migration under the stressing of electron flow. The structure of lead-free solders mainly composed of Sn-based solder tends to nucleate cyclic twin structure with only two grains. The misorientation angle between the two grains is calculated to be a constant value of 57.2 degrees in this study. It is confirmed that the solder joints of the cyclic twin structure have a excellent inhibitory effect on electromigration failure.

Introduction of several % of N into GaAs can provide large variability in lattice constant and band gap. The introduction of heterostructure into the nanowire provides intentional carrier control within the ststem, showing the possibility for the realization of advanced electronic devices. In this study, we report the results of X - ray diffraction (XRD) and electron back scattered diffraction (EBSD) investigation on the structural properties of GaAs - based core - multishell nanowires with GaNAs shell layer prepared by molecular beam epitaxy. The introduction of N into the GaNAs shell showed the peak shift of zinc-blende (ZB) related XRD GaAs (111) peak to the high angle side, indicating the strain deformation of the entire nanowire. In addition, the N introduction reduces the intensity of the wurtzite(WZ)-related GaAs (0002) peak. The phenomenon was further investigated by EBSD. As a result, the WZ structures have smaller diameter than ZB phases, suggesting the transformation of WZ structure to ZB by the introduction of GaNAs shell

Large body-size and heterogeneously integrated packages have become essential for high-performance computing applications. As an example, designs such as silicon interposer-based 2.5D packages have enabled the integration of high-performance silicon and memory in close proximity, greatly increasing the bandwidth and throughput of these devices. Within such a package, the interaction among the many sub-components and materials creates a complex thermo-mechanical response in the interconnections, which includes micro-bumps and C4 bumps. In addition, such components frequently require a high-layer count and high-thickness PCB, which creates a challenge for the reliability of the solder joints. As a result, the overall reliability of PCB assembly needs to be evaluated at every level of the interconnect. In this study, a large 2.5D flip chip package was subject to temperature cycling testing. This component was also attached to a PCB, and the entire assembly went through temperature cycling as well. Over the duration of testing, a series of microstructure evaluations were performed at the micro-bump, C4 bump, and solder joint level. Each analysis included polarized optical imaging, SEM (Scanning Electron Microscope), EBSD (Electron Backscatter Diffraction) and strain contour analysis. With these techniques, the methodology was able to not only observe the degradation and microstructure evolution, but was also able to reveal the damage by collecting high-resolution strain / stress distribution data at critical locations such as corner bumps and solder joints. These data provided insight into metallurgical processes that alter the grain structure of solder joints at different dimensions and locations, and ultimately the details of the failure mechanisms and processes.

In this work, the long-term reliability of solder joints in 3D memory ICs (Integrated Circuits) was investigated. Three types of acceleration tests were carried out, where the temperature-time profiles were chosen to reflect near-operation conditions. For components after 500, 1000, and 1500 hours of testing, the formation and growth of intermetallic compounds (IMCs) in C4 bumps was inspected and analyzed using characterization techniques including scanning electron microscopy (SEM), energy dispersive x-ray spectroscopy (EDS), and Electron Backscatter Diffraction (EBSD). Different IMC growth behaviors were observed among the three different test conditions and discussed. The different behaviors between C4 bumps and µ-bumps were also evaluated, which can be traced to differences in the solder volume and the IMC/solder ratio between these two structures.

We have constructed a model capturing the statistical nature of non-uniform thermionic electron emission from polycrystalline W cathodes. This model incorporates the proportion of different crystallographic emitting surfaces from commercial cathode samples via electron backscatter diffraction (EBSD), the effects of surface roughness from optical interferometry measurements, and surface-specific work function values calculated using density functional theory (DFT). Using this model, we aim to calculate 2D emission maps and the corresponding Miram curves for real cathodes. This model provides a pathway to understanding the complex physics of emission from inhomogeneous cathode surfaces, which is a key issue for the commercial production and use of impregnated cathodes in vacuum electronic devices.

Press-fit compliant pin connection is used widely to provide electrical and mechanical connections from a printed circuit board (PCB) to an electrical connector, which then providing board to board electrical and mechanical connection. Since these pin connections carry both electrical and mechanical load, the compliant pin and PCB through-hole (PTH) interferences are critical to the long-term reliability and integrity of the connection. Yet comparing with the ball grid array (BGA) connection, there are still a quite few unknowns regarding degradation mechanisms about the press-fit compliant pin connection. This study compares complaint pins with similar chemical composition but different initial microstructures and identifies the regions of severe plastic deformation. The bonding strength, microstructural evolution and effect of thermo-mechanical cycling were observed using micro-mechanical tester, and electron backscatter diffraction (EBSD) for further measurements and analysis. The results revealed that initial microstructure played a major role in the strain development, deformation percentage, grain spread, local mis-orientation, hardness and the bonding strength of the connectors. The extended test with thermal cycling with -40°C to 125°C cycles was performed to identify any potential thermo-mechanically induced degradation.

The crystallinity of the fine interconnections was evaluated quantitatively by using electron back-scatter diffraction (EBSD) analysis The image quality (IQ) value, the average sharpness of Kikuchi pattern obtained from the analysis was applied to the quantitative evaluation of the quality of grains and grain boundaries in polycrystalline metalic thin-film interconnections. It was found that the main degradation path under high current density was along porous grain bundaries in the polycrystalline materials, and therefore, the effective lifetime due to electromigration varied drastivally depending on the volume ratio of the grain boundaries with low crystallinity in the interconnections. The crystallinity of fine interconnections varied depending on their fabrication process and their thermal hystory after the fabrication. In the case of electroplating, it was found to be important to control the lattice mismatch between the electroplated thin film and the substrate material used for the electroplating. The effective lifetime of copper interconnection varied about 100 times as a strong function of the crystallinity.

In this study, variation of the strength of electroplated copper thin films depending on the crystallinity was quantitatively evaluated by EBSD (electron back scatter diffraction) and a micro tensile test using FIB (focused ion beam) technologies. For the crystallinity evaluation, the order of the atomic arrangement was numerically evaluated by using the IQ (image quality) value obtained from the EBSD method. For the strength evaluation, tensile strength, yield stress and CRSS (critical resolved shear stress) were measured by the micro tensile test on bicrystal specimens fabricated from electroplated copper thin films. From the results of these experiments, both the intergranular fracture and the transgranular fracture were observed in the bicrystal specimens. It was also found that there is a critical IQ value at which the fracture mode of the bicrystal specimen changes from brittle intergranular fracture at the grain boundary to ductile transgranular fracture within the grain. The intergranular strength monotonically decreases with decreasing the IQ value because the total number of atomic bonds decreases in the grain boundary with low IQ value where the lattice mismatch occurs and the atomic density is relatively low, and thus, the bonding strength between grains decreases. On the other hand, as the order of the atomic arrangement increases, dislocation movement occurs easily, so that the transgranular strength monotonically decreases as the IQ value increases. It is clarified that the strength and the fracture modes of a grain boundary and a grain drastically change as a function of crystallinity.

Solid-liquid interdiffusion (SLID) bonding is a technique based on intermetallic compounds (IMCs), enabling a thermal stability at temperatures far surpassing the bonding temperature. The technique has been developed as a die attach and interconnection technology for high-temperature applications, but is also excellent for fine-pitch bonding, and for obtaining bonds with thin layers of well-defined metallurgy. Determining the phases of IMC in a SLID bond is crucial in order to understand and predict the properties of the bond. The re-melting temperature of the bond is defined by the IMCs present, and thus directly defines the high-temperature range the SLID bond can survive. Furthermore, the phases present in a SLID bond determines whether the bond is at thermal equilibrium, or if reactions to form new IMCs are expected over the lifetime of the SLID bond (at the actual application temperature). Also, material properties such as electrical conductivity and elastic modulus will depend on which phase is present in a SLID bond. The two most common SLID systems are treated in this paper: Cu–Sn has a relatively simple phase diagram, with two IMCs. The possible phases in a Cu–Sn SLID bond are easily identified by Energy-Dispersive X-ray Spectroscopy (EDX) in the Scanning Electron Microscope (SEM), and they are easily differentiated in optical microscopy as well as in SEM microscopy. Routine investigations of spatial distribution of the various phases can thus be performed by microscopy. Au–Sn has a more complex phase diagram. Au and Au–Sn IMCs are easily distinguished in optical microscopy, but not so easily in SEM. The different IMCs are not discernable neither by microscopy nor by EDX. By using Electron Backscatter Diffraction (EBSD) in combination with electron microscopy and EDX, we demonstrate phase identification and the spatial distribution of phases in a complex Au–Sn SLID bond

The orientation of Cu6Sn5 in the reaction layer can influence the electrical conductivity and mechanical properties of solder joints. This paper explores the role of Ni on the growth orientation of the Cu 6 Sn 5 layer on Cu and Ni substrates. The crystallographic texture of the Cu6Sn5 layer is measured by electron backscatter diffraction analysis (EBSD). It is shown that the Cu 6 Sn 5 layer grows with a strong {0001} fibre texture when Sn-3.0Ag-0.5Cu-xNi (wt.%) alloys are soldered to Cu substrates, and that the Cu6Sn5 growth texture changes to a {1010} fibre texture when Sn-3Ag-0.5Cu-xNi (wt.%) is soldered to Ni. The Cu 6 Sn 5 composition and nickel distribution are examined and the thickness, grain size and the growth facets of Cu 6 Sn 5 crystals in the layer are investigated to understand the effects of nickel content on the Cu 6 Sn 5 layer morphology and texture. The results are used to discuss the potential of using Ni as a means to control the texture of the intermetallic layer.

In this study, grain boundary quality in terms of order of atomic arrangement of electroplated copper thin films was evaluated by using the IQ (Image Quality) value obtained from an electron back-scatter diffraction (EBSD) method, and the grain and grain boundary strength was evaluated by applying micro tensile test. In addition, in order to investigate the relationship between the strength and grain boundary quality, molecular dynamics (MD) simulations were applied to analyze the deformation behavior of a bicrystal sample and its strength. The variation of the strength and deformation property were attributed to the higher defect density around grain boundaries than that in grains, which impeded the development of slip systems.

This study focuses on the morphologies of primary Cu 6 Sn 5 intermetallics in small free standing SnCu (O 270 μm) solder balls. Those showed a large variety of different shapes and sizes ranging from facetted hexagonal rods, to partly facetted splitting crystals and parallel growing branches, to dendritic crystals without facets. The results of electron backscatter diffraction (EBSD) measurements confirm [0001] as the major growth direction and the {10I0} planes as facets of the hexagonal rods. The formation of splitting crystals parallel to the {10I0} planes may be caused by a slight deviation of the major growth direction towards . Morphology transition to dendritic structures can be influenced primarily by increasing the Cu content of the alloy and the cooling rate. However, strong variations occur even if the composition and the cooling rate are constant. Differences in undercooling of the Cu 6 Sn 5 phase have been discussed as a possible reason, since a decreasing solidification temperature promotes a faster initial phase growth due to the increasing oversaturation of the melt’s Cu content.

Inhomogeneous local minority-carrier transport in thin-film solar cells is a critical aspect for the device operation. In this work, we applied a transport imaging (TI) technique to the intra- and inter-grain carrier-transport properties of cadmium telluride (CdTe) solar cell materials. We compared the TI results with cathodoluminescence and electron backscatter diffraction (EBSD) on the same CdTe thin film. The diffusion lengths of two distinct grain interiors were measured directly, and the values are significantly different. Three types of grain boundaries (GBs) determined by EBSD were studied by TI, and they have different decays, suggesting that different GB structure can be responsible for carrier-transport properties. Further, we did a 2D analytical simulation of carrier diffusion across GBs with varying GB lifetimes. The results suggest that GB lifetimes affect the carrier transport. Comparison of multiple technique results, together with numerical simulation, provides a deeper understanding of carrier-transport properties.

We propose combined solder-TSVs and microbumps for cost reduction of 3-D integration. In this study, we find that crystal orientation of solder TSVs are oriented in the same direction by EBSD and TSVs are filled with single solder grain, i.e. grain boundaries are not observed at TSVs. We investigate the dependence of the cooling rate.

In this work, we have constructed a simplified statistical model of electron emission for polycrystalline W cathode surfaces. Construction of this emission model requires knowledge of which surfaces are present, the area fractions of each surface, and the work function values of each surface. To create our model, we have drawn upon previous work which used Density Functional Theory (DFT) to explore the effect of O, Ba and Ba-O adsorbates on the work function and stability of W surfaces, and have combined these DFT data with experimentally-derived surface grain orientations from polycrystalline W cathodes obtained using electron backscatter diffraction (EBSD). Using our model, we have constructed semiempirical cathode Miram curves and practical work function distribution (PWFD) curves based on DFT data, EBSD data of real cathode surfaces, and well-known empirical emission equations.

Lead-free solder joints have been shown to increase the risk for crack formation in the PCB laminate under the solder pads. As such cracks propagate during thermal cycling, they decrease the strain imposed on the solderjoint by acting as strain relief. In accelerated thermal cycling, these joints have been found to remain virtually undamaged even after a very high number of cycles. If these cracks do not form or propagate to the same extent under milder cycling conditions, typical of service conditions, it may lead to an overestimation of the fatigue life of the solder joints in accelerated testing. In this work, the extent of strain relief and the influence of grain orientations on the initiation and propagation of these cracks are investigated through FE-modelling and compared to what has been experimentally observed for cross-sections of solder joints moulded in epoxy resin with added fluorescent agent and inspected using UV-light and electron backscatter diffraction. Due to the strong anisotropy of lead-free solder joints, the stress transferred to the laminate will vary significantly depending on grain orientation. The presence of these laminate cracks adds another layer of uncertainty to the already complex SnAgCu system, where the strong effects of anisotropy, the continuously evolving secondary precipitate coarsening and its interaction with the recrystallisation process govern the damage evolution. If these effects are not properly accounted for, the interpretation of thermal cycling or modelling and simulation results may be strongly misleading.

Recent study has shown that electron flow would induce a non-uniform lattice strain along the strip and the electric current stress-induced deformation is suggested to have the same context with the conventional solid mechanics' theory. The electromigration (EM) effect is thus suggested to be a local stress relaxation at the condition beyond the critical point. In this study, in situ current stressing experiment with synchrotron radiation-based XRD and in situ SEM equipped with EBSD system were employed to investigate the electric current-induced plastic deformation. The results revealed that at a relatively higher level of current density and the corresponding lattice strain, twinning accompanied with the voids/hillocks formation would be found. When slightly decreasing the current density, no twinning but only voids/hillocks formation could be found. The authors hope this study will advance the knowledge of electric current-induced plastic deformation and provide a further guideline for EM-resistant materials.

Seeding is an explored way to control the final structure of Silicon PV ingots. In HPMC-Si (High Performance Multi-Crystalline-Silicon) ingots, nucleation on numerous seed grains creates grain boundaries that can terminate the propagation of dislocation clusters. In the present work, we focus on the impact of the initial growth in G2 ingots that were prepared by directional solidification with a seed layer of poly-Si chunks. The subsequent grain structure formation was characterized by photoluminescence, metallography, and EBSD (Electron Back Scatter Diffraction). In the remaining seed region, different photoluminescence intensities are evidenced which reveals the existence of two morphologies, a genuine non-melted seed from the poly-Si chunks, and a region within the seed layer that is generated from re-solidified infiltrated molten silicon. Both grain morphologies in the seed layer have a random orientation and we evidenced that all grains at the solid-liquid interface grow by epitaxy when growth starts. As a consequence, grains in the first growth layer are also randomly oriented. The columnar grains, which grow from wider grains in the seed layer, are larger. During growth competition, these grains reach a higher solidification height compared to grains that grow on narrow seeds. Additionally, the dominant grain boundary types are RAGB (Random Angle Grain Boundary), followed by Σ3 twin boundaries in both seed and growth regions. These results give prospects to improve seed arrangement or coating for application to HPMC-Si process.

In the semiconductor device field, the element materials constituting the interior of the semiconductor devices are rapidly miniaturized due to continuous improvement of high performance and power saving. However, it's getting harder to guarantee the long-term reliability of products because of the various degradation phenomena such as very high local Joule heating and electromigration (EM). Recently, it is reported that EM tends to occur along the grain boundaries in the interconnection material, and thus, it is necessary to quantitatively evaluate the grain boundary strength for estimating the lifetime of the interconnection and clarification of the dominant factors in order to assure the product reliability. In this study, grain boundary quality in terms of order of atomic arrangement was evaluated by using the analysis parameter IQ (Image Quality) value obtained from electron back-scatter diffraction (EBSD) method, and grain boundary strength was evaluated quantitatively by applying micro tensile test method to electroplated copper thin films used as an interconnection material. As a result, it was found that the strength of both a grain and a grain boundary changed as a function of the order of the atomic arrangement. In the low IQ value range, brittle fracture occurred at a grain boundary, and the strength of a grain boundary monotonically decreased as the IQ value decreased. On the other hand, in the high IQ value range, transgranular ductile fracture appeared and the yield stress of a grain monotonically decreased as the IQ value increased. Therefore, the IQ values was found to be the dominant factor of the strength of a grain and a grain boundary.

Electroplated copper thin film interconnections have been used in advanced semiconductor devices. However, it was found that the electrical properties of the electroplated copper thin film vary drastically depending on its micro texture such as low crystallinity grains and grain boundaries, and fine columnar structure. Therefore, in this study, the effect of the introduction of the tantalum-oxide layer between a tantalum barrier layer and a copper seed layer was evaluated by using XRD (X-Ray diffraction) and EBSD (Electron Back-scatter Diffraction) analyses for the improvement of the crystallinity. The crystallinity improved drastically by introducing the tantalum-oxide layer and thus, both the reliability and stability of the electroplated copper thin film were clearly improved.

Heat resisting properties of Ag plated copper alloy contacts with Ni underplate were investigated by electron backscatter diffraction (EBSD), scanning transmission electron microscope (STEM), X-ray photoelectron spectroscopy (XPS) and contact resistance measurements. Ni underplate effectively prevented copper diffusion to the Ag surface from the substrate during 200°C heating, and the prevention effect saturated in 0.25 μm or more of the thickness. Ni was not detected in the Ag surface after heating at 200°C for 500 h. From the observation with STEM, it was found that Cu mainly diffused through grain boundaries of Ni and to the Ag surface. Decreasing the density of grain boundaries in Ni is possible to prevent diffusion of Cu, even the thickness of the Ni underplate is 0.1 μm.

The samples were soldered using copper pillars and Sn-3.0Ag-0.5Cu solder paste with a typical reflow profile about peak time of 245°C. In order to observe the microstructure and crystal orientations, the sample is grinded and polished to be characterized by scanning electron microscope (SEM) and electron backscattered diffraction (EBSD). By analyzing the microstructure and crystal orientation, the number of grains contained in the sample and grain orientation is obtained. Next, in order to study the relationship between deformation and crystal orientation, the sample was subjected to uniaxial tensile test. The following results were obtained by the experiment: 1) In the process of deformation, the slip system which is activated is closely correlated to the grain orientation; 2) There may be several slip systems that were activated during deformation, though the solder joint is the single crystal structure.

Thermal ageing of micro-porous sintered silver was examined under high temperature exposure. Silver sinter paste was printed in a shape of a tensile specimen on a Cu substrate, and was sintered at 250 °C for 1 h in air with no pressure. Specimens were exposed for 0, 50, 500, and 1000 h at 250 °C. Tensile strength was obtained at each ageing stage at a strain rate of 1.0×10−5/s. The evolution of microstructure was characterized by SEM/EBSD. The relationship between ageing microstructure and tensile strength was discussed. TEM observation was performed to explain the porosity reduction process of micro-porous structure.

Three-dimensional (3D) package technology is currently considered as one of the best solution to beyond Moore's Law and achieve miniaturization, high density and multi-functional of the device. Copper filled in through silicon via (Cu-TSV) technology with good electrical performance and high reliability, is a new type of 3D packaging technology. Cu-TSV has been widely used in integrated circuit technology due to its excellent interconnection performance. Residual stress could be generated in Cu-TSV during the manufacturing process which could be relaxed by annealing treatment. However, the Cu protrusion out of the TSV could also occurred during annealing process due to the large temperature variation and the severe mismatch of thermal expansion coefficient between copper (17.6×10−6/K) and silicon (2.8×10−6/K). This could be a potential threat to reliability of the back-end interconnect structure, since it might lead to cracking or even failure of the device. In this paper, the TSV samples were annealed at different temperatures and times to study the protrusion and microstructure of the copper. The heating temperatures were 250°C, 350 °C and 450°Cwith 30min, 60min and 90min, respectively. The protrusion behaviors and microstructure of different samples were further characterized and compared. The protrusion behaviors were characterized by Focus Ion Beam (FIB) and Confocal Laser Scanning Microscope (CLSM), which reveal that the annealing temperature and heating time have a significant effect on the protrusion. With the annealing temperature and time increase, the protrusion behavior becomes more and more obvious, however, the annealing time has little effect than annealing temperature on the protrusion. The cross section microstructure of TSV was also studied by Electron Backscatter Diffraction (EBSD). The results showed that the Cu grain size of all specimen increases but the grain orientation no significant changes after annealing. The grain size is positive correlation to the annealing temperature. The residual stress in Cu and Si around the TSV was measured using Raman spectrometer. This work could help to find out the optimized annealing condition which could further improve the reliability of TSV structure.

The anisotropic behaviors of micro solder interconnects have been recognized as a crucial reliability concern due to the continuous trend of miniaturization in high-performance electronic devices. The hexagonal structure η-Cu 6 Sn 5 with highly anisotropic phase structure has considerable influence on its growth behavior during soldering and performance in service. In the present work, synchrotron radiation real-time imaging technology was used to in situ investigate the growth behavior of η-Cu 6 Sn 5 intermetallic compound (IMC) in Cu/Sn/Cu solder interconnects during soldering under temperature gradient. The microstructure of the Cu/Sn/Cu micro interconnects and the orientation of η-Cu 6 Sn 5 IMC grains after soldering were characterized. The electron backscattered diffraction (EBSD) analysis revealed that the η-Cu 6 Sn 5 grains showed a preferred orientation, with their [0001] direction being nearly parallel to the direction of temperature gradient. The results pave the way for controlling the orientation of the small number of interfacial IMC grains in three-dimensional (3D) packaging technology.

The effect has been examined of Cu-Filled TSV under thermal shock test. The mismatch in the coefficients of thermal expansion between Cu metal and Silicon generates the thermal mechanical stress. The stress plays critical effect on the performance of the device structure and generates cracks. The Cu metal volume increase and separate from Si matrix after thermal shock test. The Cu metal drift can cause failure issues on the TSV and the cross-section of crack has been observed in the interface between Cu metal and SiO 2 . The results show that the cracks generate along Cu grains, but irregular Cu grains have an ability to block the crack extension. The Electron Back-scattered Diffraction (EBSD) technique was adopted to characterize the micro-structure of the samples before and after thermal shock test, and the result show that the Cu grains has an indicated growth after thermal shock test.

We explore the femtosecond laser-induced modifications (i.e., morphology, crystallization, and nanostructure) in Li 2 O-Nb 2 O 5 -SiO 2 glass at high-repetition-rate (1030nm, 300fs, 300 kHz) to get insight on the ultrafast laser-matter interaction according to pulse energy and writing configuration. Three-dimensional SHG patterns with controllable angular dependence were achieved. Electron backscatter diffraction indicated that the angular dependence was associated to preferential nanocrystals orientation: crystal polar axes are distributed within a plane perpendicular to the incident laser polarization direction.

In High Performance Multi-Crystalline-Silicon (HPMC-Si) ingots, small seed grains generate grain boundaries that can terminate the propagation of dislocation clusters. Here, we focus on the seed template formation and its impact on the initial growth by directional solidification utilizing metallography, photoluminescence, and EBSD analysis. In the seed region, two randomly oriented grain morphologies are found: a genuine non-melted seed from the poly-Si chunks, and a re-solidified infiltrated molten silicon region. All grains grow by epitaxy on the seed grains and grains grown from wider grains in the seed, reach a higher solidification height.

Larger grain sizes and crystallographic texture in the absorber layer are correlated with performance in polycrystalline inorganic thin film solar cells because they lead to reduced densities of recombination centers and traps at grain boundaries. In this work, we compare the effects of rapid thermal annealing (RTA) and furnace annealing on film morphology, grain growth, and crystallographic texture in Cu2ZnSnS4 (CZTS) thin films deposited on Mo-coated glass by RF cosputtering. Using x-ray diffraction (XRD),scanning electron microscopy (SEM), and electron backscatter diffraction (EBSD), we show that RTA induces significant grain growth and texture without the degradation of the substrate caused in furnace annealing by the high temperatures required for CZTS phase formation. CZTS grains grown in RTA annealed samples were 2–3 times larger than those in furnace-annealed samples. Significantly, this is demonstrated in RTA on sodium-free glass which implies that RTA and similar processing methods may be capable of producing desirable CZTS grain distributions on alternative substrates such as metal foil, plastic, or thin glass.

In recent years, Sn-Bi solders get much attention because low temperature bonding technique is possible to reduce warpage of package and stress at solder joining. However, few studies attempted to their reliability and knowledge of microstructure of the solder bump. In this study, we investigated the difference of inter-metallic compounds (IMCs) formation between Sn57wt%Bi solder (Sn-Bi eutectic solder) and Sn30wt%Bi solder (Sn30Bi solder) during electro-migration test. Electron probe micro analyzer (EPMA) and Electron backscattered diffraction (EBSD) techniques were employed to analyze of microstructure and crystal orientation of the interconnection bump. Maximum electrical resistance increase during electro-migration test using Sn-Bi eutectic solder and using Sn30Bi solder were 82 and 20 %, respectively. In case of using Sn-Bi eutectic solder, needle-shaped Cu6Sn5 and (Cu, Ni)6Sn5 were formed at solder/ Ni pad interface after bonding. However, they transformed to (Ni, Cu)3Sn4 and thick Ni(P-rich) layer at solder/Ni pad interface after current stressing. Using Sn30Bi solder, only dense scallop-type (Cu, Ni)6Sn5 was formed at solder/ Ni pad interface after bonding. And they were stable during electro-migration test. Other IMCs did not grow at solder/ Ni pad interface.