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In back-end-of-the-line (BEOL) patterning process, porous low-k dielectrics are degraded by plasma reactive species during etching and resist stripping –this is so-called plasma induced damage (PID). PID increases the k-value of dielectrics and inter-line capacitance, which causes resistive-capacitive (RC) delay. In this paper, the authors introduce two approaches to suppress the PID, using a novel volatile organic film. The first approach is an improved Post Porosity Plasma Protection (P4, or pore stuffing), and the second approach is based on the use of a temporary plug. In the case of pore stuffing, the filling ability and protection effect are evaluated on various blanket low-k dielectric materials. For the plug approach, its effectiveness is demonstrated in terms of electrical characteristics and reliability using a patterned interconnect test vehicle. [ABSTRACT FROM AUTHOR]