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A convenient and reliable method for the determination of internal quantum efficiency (IQE) in GaN-based light-emitting diodes (LEDs) is presented. By using the peak point of the efficiency curve as the parameter of the carrier rate equation model, IQE of LEDs is shown to be unambiguously determined without any information on the recombination coefficients or LED structures. The theoretical analysis model was used to determine IQE of LED samples. When the theoretical IQE model is applied to the measured external quantum efficiency (EQE) of a blue and a green LED, good agreements between the measured data and the theoretical fit curves are found.

We report on the fabrication and characterization of stretchable interconnects using room temperature liquid alloy filled PDMS microchannels. Several novel fabrication techniques are presented to increase the functionality and manufacturing yield. These include selective deposition of a gold wetting layer at the bottom of the channels, microfluidic injection of room temperature liquid alloy, and reservoirs for accommodation of surface mount components. Achieved maximum stretchability of a bi-axial diamond-shaped structure is 100% with a 0.24 Omega resistance variation. Active electronics is also integrated onto the PDMS substrate with stretchable interconnects and tested for functionality.

This paper reports a new and simple way to fabricate biaxially stretchable interconnects. To increase the stretchability, two novel ideas are suggested. These include 1) a geometry of 2-D diamond shaped gold lines on a PDMS substrate, and 2) coverage of potentially breakable points with liquid alloy. Stretchability of up to 60% was obtained using these techniques.

A PVDF-on-Silicon 8-element ultrasound transducer array (1 mm x 1 mm and element spacing of 1 mm) is fabricated and characterized. To improve the performance of the transducer, new CMOS-compatible fabrication technologies are introduced. These include: 1) micro-contact printing on non-radiating areas, and 2) glass microspheres (7-20 mum in diameter) embedded low melting temperature alloy (LMA) material for backside electrical connection. The first improvement removes the impedance mismatching of adhesive layer (e.g., lower sensitivity) between the PVDF and backside contact while the second one improves the pulse-echo signal quality by eliminating reflections at the backing/water interface. The fabricated array elements are tested in a water tank and their pulse-echo response are recorded. The central frequency of each element is 25 MHz with a 100% measured 6-dB bandwidth (60% 3-dB bandwidth).

This study presents the first experimental data for the impact of CMOS hot-carrier degradation on the performance of folded-cascode op-amps. Two types of folded-cascode op-amps have been designed and fabricated using a 0.8 /spl mu/m double-metal CMOS process. After high voltage stress, the degradation of performance parameters such as open-loop voltage gain, offset voltage, unity-gain frequency and phase margin has been analyzed and physically explained in terms of hot-carrier degradation.