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This article presents a new circuit topology for high voltage gain active switched boost quasi Z-source inverter (qZSI) and a pulsewidth modulation (PWM) technique. The higher boosting capability with a lower number of elements, the continuous source current, the less voltage stress across the devices, and having the common ground are the main advantages of the proposed structure. The voltage gain of the proposed inverter is twice that of the conventional capacitor-assisted qZSI (sCA-qZSI). Other benefits of the proposed inverter over the sCA-qZSI are the reduction of Z-source passive components and shoot-through current. Compared to the conventional active switched inductor boost qZSI, the proposed inverter has higher output voltage and also lower shoot-through current, while it has fewer components (one fewer inductor, two fewer diodes, but one more capacitor). The boost factor of the proposed inverter is more than twice that of the classic ones. Besides, a high gain PWM technique is proposed, which can be applied to any types of Z-source inverters. Both the simulation and experimental results of the proposed inverter under the proposed PWM technique are examined to validate their operation. [ABSTRACT FROM AUTHOR]

The increased penetration of photovoltaic (PV) systems in different applications with critical loads such as in medical applications, industrial control systems, and telecommunications has highlighted pressing needs to address reliability and service continuity. Recently, distributed maximum power point tracking architectures, based on dc–dc converters, are being used increasingly in PV systems. Nevertheless, dc–dc converters are one of the important failure sources in a PV system. Since the semiconductor switches are one of the most critical elements in these converters, a fast switch fault detection method (FDM) is a mandatory step to guarantee the service continuity of these systems. This paper proposes a very fast FDM based on the shape of the inductor current associated to fault-tolerant (FT) operation for boost converter used in PV systems. By implementing fault diagnosis and reconfiguration strategies on a single field-programmable gate array target, both types of switch failure (open- and short-circuit faults) can be detected, identified and handled in real time. The FDM uses the signal provided by the current sensor dedicated to the control of the system. Consequently, no additional sensor is required. The proposed FT topology is based on a redundant switch. The results of hardware-in-the-loop and experimental tests, which all confirm the excellent performances of the proposed approach, are presented and discussed. The obtained results show that a switch fault can be detected in less than one switching period, typically around 100 ms in medium power applications, by the proposed FDM. [ABSTRACT FROM PUBLISHER]

This paper proposes fault-tolerant (FT) operation of a single-switch dc-dc converter under a switch failure. In order to improve the reliability in critical applications, FT operation is mandatory to guarantee service continuity. The FT operation of a power system can be performed in three steps: fault diagnosis (detection and identification) and remedial actions. In the case of a switch failure, suitable fault detection is essential to avoid its propagation to the whole system. This study is based on a fast and efficient open- and short-circuit switch fault diagnosis. Both types of switch failure can be detected, identified, and handled in real time by implementing fault diagnosis and reconfiguration strategies on a field-programmable gate array target. No additional sensor is required to perform the fault detection. A redundant switch and a bidirectional switch are needed for converter reconfiguration in postfault operation. The results of hardware-in-the-loop and experimental tests, which all confirm the good performances of the proposed approach, are presented and discussed. [ABSTRACT FROM AUTHOR]

Fault detection (FD) in power electronic converters is necessary in embedded and safety critical applications to prevent further damage. Fast FD is a mandatory step in order to make a suitable response to a fault in one of the semiconductor devices. The aim of this study is to present a fast yet robust method for fault diagnosis in nonisolated dc–dc converters. FD is based on time and current criteria which observe the slope of the inductor current over the time. It is realized by using a hybrid structure via coordinated operation of two FD subsystems that work in parallel. No additional sensors, which increase system cost and reduce reliability, are required for this detection method. For validation, computer simulations are first carried out. The proposed detection scheme is validated on a boost converter. Effects of input disturbances and the closed-loop control are also considered. In the experimental setup, a field programmable gate array digital target is used for the implementation of the proposed method, to perform a very fast switch FD. Results show that, with the presented method, FD is robust and can be done in a few microseconds. [ABSTRACT FROM PUBLISHER]

Power-electronics-based hybrid dc power systems (HDCPSs) are increasingly used in many industrial applications such as land, sea, and air vehicles. In these systems, small dc-link and LC filter capacitors are of great interest for weight saving. Usually, in HDCPSs, there are constant power loads and negative dynamic impedance of these loads may generate unstable oscillations. Besides, the risk of resonance may be increased under unbalanced load conditions. In this paper, a distributed active oscillation suppression approach is presented. It is based on the analytical study of the linearized model of the studied system around the operating point. The studied system consists of one main dc source and one storage element supplying two loads: a permanent magnet synchronous motor connected to the dc link by a voltage source inverter and a resistive load supplied by a dc/dc converter through the same dc bus. The proposed approach is particularly used to overcome the resonance under unbalanced load conditions and allows reducing dc link and LC filter capacitors for weight saving. Simulations and experimentations are carried out which confirm the validity of the proposed approach. [ABSTRACT FROM AUTHOR]