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Spin-transfer-torque magnetic random access memory (STT-MRAM) based on magnetic tunnel junction (MTJ) device has attracted significant attention from academics and industries. Nevertheless, the thermal effect under bias operation affects the overall performance and stability of a device. To evaluate the thermal phenomenon in MTJ devices accurately, the non-equilibrium effect between the electron and the phonon near the electrode-barrier interface cannot be ignored. The existence of the interface leads to additional thermal resistance hindering the heat conduction of tunnel junction. Therefore, an effective equivalent model concerning the interface effect is necessary to represent the heat transportation of the device. In this article, a nanoscale thermal transport model of the MTJ device is proposed. The influence of the thermal conductivity of the nano-oxide layer on the temperature distribution is discussed. The interface energy balance transport model is used to clarify the non-equilibrium relationship between the phonon and the electron at the CoFeB/MgO/CoFeB interfaces. A parameterization study is conducted to illustrate the temperature distribution in the nanoscale thermal transport model. Furthermore, the phonon-electron coupling distance ($\delta$) based on the thermal conductivity of the phonon ($\kappa _{p}$) and the electron ($\kappa _{e}$) of the device is implemented to construct the effective equivalent model using finite element modeling (FEM), which could realistically reflect the thermal transport under working conditions. The established equivalent model has a guiding role in exploring the thermal transportation in the nanoscale MTJ device. [ABSTRACT FROM AUTHOR]

Current-induced domain wall motion (CIDWM) shows promising prospects with low power, high density, high speed, and so on. Recent studies have demonstrated that magnetic tunnel junction (MTJ) based on CIDWM has great potential in mimicking a non-volatile artificial neuron and synapse. By combining the effect of the interfacial Dzyaloshinskii–Moriya interaction (DMI) to stabilize the Néel-type domain wall (DW) and the high-speed low-power advantages of spin orbit torque (SOT), the novel MTJ device is experimentally demonstrated with low threshold current and high propagation speed, which shows potential applications in the field of the artificial neuron and synapse. In this article, a compact model for CIDWM-MTJ based on SOT and DMI is presented. The model integrates the SOT mechanism for magnetization reversal and DW nucleation, CIDWM behaviors, and tunnel resistance theory of MTJ nanopillar. The micromagnetic simulation and the temporal evolution of the DW position are implemented by solving the Landau–Lifshitz–Gilbert (LLG) equation and the 1-D model. Based on the developed model, a hybrid CIDWM-MTJ/CMOS circuit is simulated for verification. The presented model combines the CIDWM dynamics and the MTJ magnetic dynamics, showing potential application for the simulation of all-spin artificial neural network (ANN). [ABSTRACT FROM AUTHOR]

A fast writing strategy of spin transfer torque (STT) magnetic random access memory (STT-MRAM) combined with pipeline architecture and early write termination (EWT) technology is proposed in this article. Both the writing speed and the writing power consumption of STT-MRAM are optimized. First, based on the proposed pipeline structure, the writing operation can be conducted within a single clock cycle, much decreasing the writing time. Second, the EWT technology is adopted in the writing operation. In the traditional operation of STT-MRAM, the same data are repeatedly written to the memory cell, which wastes the writing power consumption and the writing operation time. In this article, combined with the EWT technology and the pipeline architecture, the unnecessary writing power is reduced by 92.8%, while the necessary writing power is increased by 19.8%. Taking 32 kb data for the writing operation, the operation speed of the new writing strategy is increased by 67.4% compared with the incumbent writing technology. The proposed strategy has potential application in the embedded STT-MRAM acting as cache memory in the computer system. [ABSTRACT FROM AUTHOR]

A predictive algorithm for accurately determining the crosstalk peaks caused by SiC MOSFETs is proposed in this article, which is very important to better design the drive and protect circuits of SiC MOSFETs. Compared to the conventional algorithm of crosstalk peaks, the nonlinearity of gate-drain capacitance (Cgd) is first considered in the proposed algorithm. In detail, the differential expression of the crosstalk peaks is deduced, in which, the main factors affecting crosstalk peaks are all included. Following, the execution flow of the predictive algorithm is provided according to the differential expression. To verify the accuracy of the proposed algorithm with considering the nonlinearity of Cgd, the simulation and experiment platforms are established and verified by using Kelvin packaged SiC MOSFET IMZ120R045M1 (1200 V/52 A). The calculation results of the proposed algorithm are compared with the conventional algorithm without considering the nonlinearity of Cgd under different working conditions of SiC MOSFET. Finally, the calculation results, the simulation, and experiment results show that the proposed algorithm is effective and has better accuracy. Therefore, the predictive algorithm proposed in this article provides a theoretical reference to better design the drive and protect circuits of SiC MOSFETs. [ABSTRACT FROM AUTHOR]

A magnetic tunnel junction-based register with separate read and write paths is proposed in this paper. Analysis of the operation of the circuit is performed, and methods for determining the key parameters of the device are presented. The simulation of the circuit is performed in Verilog-A, and the simulation results demonstrate the operational characteristics of the circuit. This new spin-based flip flop offers a 23% reduction in the number of devices and a 23.6% reduction in its dissipated power when compared with a pure CMOS implementation with the added benefit of nonvolatility. A 4-b shifter based on the proposed spin register is presented, too. [ABSTRACT FROM PUBLISHER]

Integrated circuits operated in the near-threshold region exhibit specific merit with high energy efficiency. A near-threshold model is highly required for the circuit design. In this paper, a near-threshold drain current model is proposed based on the surface inversion layer charge model for analyzing digital circuits. The short-channel effect in deep submicrometer is also included in the model. Moreover, the delay and energy parts based on the near-threshold drain current model are derived and integrated in the model. Two process design kits (PDKs) are used for parameter extraction to demonstrate the feasibility of the proposed model. The results show that the proposed model can be used for the near-threshold circuit calculation, with the benefit of high accuracy. [ABSTRACT FROM AUTHOR]

A dual-mode control scheme is proposed in this letter to control a boost power factor correction (PFC) converter. The scheme combines both continuous and critical conduction modes and has the merits of simple control, high efficiency in a light-load condition, and being fit for personal computer (PC) power applications. The dual mode control circuit can be easily implemented into IC. The operating principles and control scheme are analyzed and discussed in detail. A 300 W boost power PFC prototype is implemented to verify the feasibility of the proposed scheme. The results prove to be satisfactory. [ABSTRACT FROM AUTHOR]

A micromachined thermopile infrared sensor is designed and optimized with high detective sensitivity in the article. A matched chopper operational amplifier with good linearity is implemented for signal processing. Optimizations of the sensor’s structure are proposed by the adjustment of the length of the thermocouple pairs and the filling of the back-etched cavity based on the adopted thermocouple materials. A passivation layer is implemented to minimize the flicker noise of the sensor. Based on the requirement of the optimized thermopile sensor system, both the flicker noise and the low-frequency noise of the system are suppressed for achieving high sensitivity. The chopper operational amplifier circuit with a single-ended closed-loop diagram is specifically designed for signal amplification and noise suppression. The fabricated device shows improved characterizations, with the responsivity of 182.72 V/W, detectivity of $2.47\times 10^{{8}}$ cmHz1/2/W, time constant of 10 ms, and total resistance of 270 $\text{k}\Omega $. The sensitivity of the designed system, including the sensor and the amplifier, is about 15 mV/°C, when the gain is 40 dB and the sensor-target distance is 3 cm. The system shows wide applications in the fields of noncontact temperature measurement and other special applications. [ABSTRACT FROM AUTHOR]

Spin-Torque-Transfer Magnetic Tunnel Junction (STT-MTJ) device shows wide applications in many important scenarios, including magnetic random access memory (MRAM), logic design, and high-frequency application. Its characterizations at the high frequency are studied intensively recently. In this article, the high-frequency properties of the STT-MTJ device are investigated thoroughly, including a de-embedding approach followed by an extraction procedure for removing the influences from the environment and the package. The de-embedding approach is performed on the STT-MTJ device operated at a high frequency, which can be used to calibrate its electrical characteristics by eliminating the environmental influence. After the calibration, the equivalent circuit for the MTJ device at high frequency can be set up, followed by the extraction procedure of the parasitic parameters of the high-frequency-equivalent-circuit. Combined with the extracted parameters, the equivalent circuit can be used for the simulation work with the MTJ device involved in the high-frequency operation. [ABSTRACT FROM AUTHOR]