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A novel carrier stored trench bipolar transistor (CSTBT) with split gate (SG) and recessed emitter trench (SGRET CSTBT) is proposed. The proposed device features a SG structure with thicker oxide layer under the trench gate and recessed trench emitter, respectively. Compared with the conventional CSTBT with recessed emitter trench (RET CSTBT), the proposed device not only significantly reduces the gate-collector capacitance ( ${C} _{\mathrm{ GC}}$ ) but also alleviates the negative impact of the heavily doped n-type carrier stored layer on the breakdown voltage (BV). Simulation results show that with the similar BV of about 650V, the on-state voltage drop ( ${V} _{\mathrm{ ceon}}$ ) at ${J} _{\mathrm{ ce}}$ =200A/cm2 for the proposed SGRET CSTBT is only 1.11V, which is 0.19V lower than that of the conventional RET CSTBT. Moreover, compared with the conventional RET CSTBT, the ${C} _{\mathrm{ GC}}$ at the ${V} _{\mathrm{ ce}}$ of 25V, total gate charge ( ${Q} _{\mathrm{ G}}$ ) and miller plateau charge ( ${Q} _{\mathrm{ GC}}$ ) for the proposed device are reduced by 84.3%, 38.6% and 51.6%, respectively. As a result, the trade-off relationship between the ${V} _{\mathrm{ ceon}}$ and turn-off loss ( ${E} _{\mathrm{ off}}$ ) as well as trade-off relationship between the turn-on loss ( ${E} _{\mathrm{ on}}$ ) and $\text{d}{V} _{\mathrm{ ak}} / \text{d}{t}$ of the free-wheeling diode (FWD) are significantly improved for the proposed device. At the same ${V} _{\mathrm{ ceon}}$ of 1.16V, the ${E} _{\mathrm{ off}}$ is reduced from 9.2mJ/cm2 of the conventional one to 3.3mJ/cm2 of the proposed device. At the same ${E} _{\mathrm{ on}}$ of 8.3mJ/cm2, the $\text{d}{V} _{\mathrm{ ak}} / \text{d}{t}$ of FWD for the proposed device is reduced by 24.5% compared with that of the conventional RET CSTBT, which significantly suppresses the EMI noise.

The MOS-controlled Thyristor (MCT) has been characterized by MOS-gating, high current rise rate, and high blocking capabilities. The anode short MCT (AS-MCT) is distinguished from the conventional MCT by an anode-short structure, which forms an extracting path for the leakage current at the gate-ground and develops a normally-off characteristic. The AS-MCTs are ideal switches for pulse discharge application. As a composite structure made of metal-oxide-silicon and bipolar junction transistors, AS-MCT is susceptible to ionization damage. This work reports the experimental results for the degradation of zero-load (or short) pulse discharge circuit characteristics induced by the ionization damage of its AS-MCT switch following cobalt-60 γ-ray dose up to 9160 Gy(SiO2). The radiation-induced leakage current in AS-MCT accounts for the degradations of charging time and peak surging current of the pulse discharge circuit. These degradations show a “tick”-like dependence on the γ-ray dose which are recoverable after high dose exposures, thousands of Gy(SiO2). From device and circuit physics perspectives, the damages on pulse discharge circuit are modelled, and then, this article proposes, the mechanism behind the characteristics degradation of pulse discharge circuit from the total ionization dose damage of AS-MCT switch.

A novel SIW horn antenna in W-band has been proposed and demonstrated in this paper. The proposed antenna is fabricated on a single layer of silicon substrate. In order to improve the gain of the antenna, a dielectric slab using the same silicon substrate is installed at the front-end of the antenna. In order to raise the front-to-back ratio, two slots are symmetrically arranged in the top and bottom metal surface which are close to the radiating aperture. Moreover, since the width of the antenna is less than 75% wavelength and thus it is suitable for active phased array. The proposed SIW horn antenna and its 1×9 array have been investigated. A wide beam scanning range of ± 20°in H-plane covering frequency form 91.5 to 96 GHz with respect to VSWR less than 2 is achieved and a high front-to-back radio of 21.3 dB is obtained. Since our proposed W-band SIW horn antenna can be easily fabricated by existing mature CMOS processing technology, it provides a low-cost solution in millimeter-wave (mmW) active phased array application for wireless communication and radar detection.

A novel magnetoelectric (ME) dipole antenna in W-band based on SIW has been proposed and demonstrated in this article. This antenna is composed of an H-shaped slot which acts as magneto dipole and four patches with corner cut which act as electric dipoles. It retains broadband characters of the ME dipole antenna while also shows additional low transmission loss features of the SIW feed structure. A broad bandwidth covering 87.5-110 GHz with voltage standing wave ratio (VSWR) less than 2 is achieved and a radiation gain of 8.2 dB with a variation less than 0.25 dB is obtained. A low backward radiation is realized and a low cross-polarization is also achieved. What's more, a wide scanning performance in H-plane is also observed. We are convinced that our proposed ME dipole antenna has potential application in areas such as mmW wide angle scanning radar and 5G wireless communication in the future.

An integrated design of waveguide-to-microstrip transition with a power divider at W-band is presented in the article. The transition and power divider is designed on the upper and lower surfaces of a quartz glass substrate. It consists of a matching patch, a resonant patch and a short plane. A microstrip power divider is integrated with the matching patch in the short plane. This makes the proposed design very compact for W-band antenna array applications. The proposed structure is investigated through full-wave simulations. Simulation results show that the integrated transition achieves an impedance bandwidth of greater than 9 GHz when the return loss below −10 dB. In addition, the total transmission loss is less than 0.4 dB in the central frequency.

Power distribution system and water distribution system, which are usually operate independently in tradition, are both important infrastructure in modern society. Under the background of renewable energy penetration increasing and energy conservation becoming social concerns, the joint operation of power distribution system and water distribution system could reduce the overall operation cost, improve social welfare and improve the flexibility of system operation. In this paper, we model the power distribution system and water distribution system, and simplify this model based on piecewise linear method. Then we obtain the model of power-water distribution system, which is a mixed integer linear programming problem. While the joint system is complex and the time spent on solving problem is too long for engineering application. Thus, in this paper, we propose an adaptive time clustering method based on the characteristic of the net load curve of power and water. We use an iterative algorithm to decide whether two adjacent time clusters could be merged into one in the joint operation problem. The case studies that the joint day-ahead operation problem, which proves that the model and method proposed in this paper could reduce the solution time while maintain high precision. It could meet the requirement of engineering application.

The control strategy of reactive power and voltage, communication between systems and the performance of the single device will affect the performance of the reactive and voltage control of the field station. On the basis of one million kilowatts of wind power base in the past three years the actual operation data and field test data, firstly analyzes the status of the wind farm without the system voltage and reactive power control system, introduces the current voltage and reactive power control system architecture and common control strategy; secondly from the station of reactive power and voltage control of the process, clarify the key factor effect of terminal voltage and reactive power control performance; the final form of the promotion of wind farm reactive voltage control performance and operation level of the measures, which is verified.

This paper presents a high-performance termination based on multi-epi method, where an intrinsic layer is used in the top layer epitaxy, and the field limiting rings (FLR) and field plate (FP) are also adopted. The introduction of the surface intrinsic layer can improve the internal electric field and meet the breakdown voltage (BV) requirements of the termination under the condition of a small termination area. As an example, simulation result of a 1200V fast recovery diode (FRD) shows that the BV is up to 1410V under a termination length of 220µm. Compared with traditional FLR and FP structures, the termination length is reduced by 58% and the BV is increased by 19%. The proposed structure can be well applied to existing high voltage power devices.

This paper firstly proposes a gate current modulator (GCM) based on fuzzy PID for voltage equalization in series connected IGBTs. A MOSFET is introduced as a variable resistance that paralleled with gate resistor. The gate of the MOSFET is controlled initially by fuzzy PID, thus the resistance of MOSFET is adjusted real-timely adapting to operation condition. The fuzzy PID is configured with hardware algorithm. The simulation results in buck circuit with four IGBTs series connected show that the peak of voltage unbalance ratio of GCM is 3.78% while that of the snubbers is 25.1 %, illustrating ten times reduction.

A novel high performance carrier stored trench bipolar transistor with shield emitter trench (SET-CSTBT) is proposed. The proposed SET-CSTBT features a shallow gate trench (SGT) shielded by a deep emitter trench with a thick oxide layer. The SGT reduces the gate depth and the deep SET with thick oxide layer shields the negative impact of the CS layer and SGT on the breakdown voltage $(BV)$ . Simulation results show that the on-state voltage drop $(V_{\mathrm{ceon}})$ at, $J_{\mathrm{ce}}=150\mathrm{A}/\mathrm{cm}^{2}$ for the proposed SET-CSTBT is 1.23V compare to that of 1.30V for the conventional CSTBT (Con-CSTBT) with same $BV$ . Meanwhile, the gate-collector capacitance $(C_{\mathrm{gc}})$ at $V_{\mathrm{ce}}=20\mathrm{V}$ for the proposed SET-CSTBT is reduced by 76.5% compared to that of the Con-CSTBT. As a result, the trade-off relationship between the $V_{\mathrm{ceon}}$ and turn-off loss $(E_{\mathrm{off}})$ is significantly improved. With the same $V_{\mathrm{ceon}}$ of 1.30V, the $E_{\mathrm{off}}$ is reduced from 19.12mJ/cm2 of the Con-CSTBT to 8.97mJ/cm2 of the proposed SET-CSTBT.

A high gain Ka-band microstrip patch antenna with simple slot structure is presented. The structure uses two patches and each patch has four slots on it. An open-loop is used to feed the two patches. The bandwidth of S 11 0 ×0.98 λ 0 ×0.06 λ 0 at 35 GHz), the peak gain in the band is high up to 11.5 dBi, and the gain in the band is higher than 10.6 dBi. The antenna has the advantages of high gain and simple structure, so it is a good choice for the small equipment.

Based on a resonant cavity with partially reflecting surface (PRS) loaded, a substrate integrated waveguide (SIW) fed cavity-backed antenna is proposed. 15 H-shaped elements that equally spaced in a rectangular grid are designed as the PRS. The proposed antenna size is 0.45λ 0 ×0.54λ 0 ×0.14λ 0 , where λ 0 is the free space wavelength of center frequency. The antenna profile is reduced by about 44% compared to conventional cavity-backed aperture antenna. An impedance bandwidth of 13.6% (33-37.8 GHz) with |S 11 | below −10 dB has been achieved.

Principles of transmitting and receiving multibeam forming networks based on microwave photonic technology are analyzed. By using non-dispersion fiber and dispersion one reasonably to build new delay units, the traditional architecture is optimized. This novel architecture significantly simplifies the system, and can enable multiple beams to scan independently, quickly and accurately.

A compact W-band tapered slot antenna on a single silicon substrate has been presented in this paper. The antenna consists of a substrate integrated waveguide (SIW) feed and an elliptical tapered slot radiator. By using metallic vias to the edge of the silicon substrate, wide scan performance in E-plane has been improved. A 7×7 antenna array based on the proposed antenna is investigated. The simulated results show that a wide beam scan characteristic covering frequency bandwidth of 90-97 GHz is achieved and a high gain better than 17 dBi is obtained. With the advantages of simple structure, low cost and compatibility with the commercial complementary metal–oxide– semiconductor (CMOS) technology, our proposed W-band antenna can be widely used in mmW active phased array for radar detection and wireless communication.

A high-gain millimeter-wave microstrip-stub antenna is presented. The main radiation is produced by four stubs, which are located on the places of the maximum electric field of the loop. And the loop is specially designed to get an asymmetric field distribution and provide proper feeding for the stubs. The -10 dB impedance bandwidth is from 59.5 GHZ to 60.8 GHZ. With a dimension of 4.7mm×5.2mm×0.254mm (0.94 λ 0 ×l.04 λ 0 ×0.0508 λ 0 at 60 GHz), the gain in the band is higher than 11.3 dBi, while the peak gain is 11.9 dBi. Just one-layer of substrate is used in the antenna, so it enjoys the advantages of simple structure and low profile.

A W-band hybrid-fed mictrostrip patch array for advanced real-time imaging applications has been proposed in the article. It is fed by a novel hybrid feeding network with lower loss compared with the parallel-fed network. The proposed array is composed of 16 series-fed taper microstrip patch subarrays with Chebyshev amplitude tapering. The series-fed subarray is fed symmetrically in the midpoint to achieve non-dispersive patterns at different frequencies. In order to decrease the transmission loss, a hybrid feeding network is de-signed to replace the multi-level parallel one between series-fed subarrays. The tapering distribution is determined by the width of the quarter wave impedance transformer in the hybrid feeding network. Simulation results show that the antenna array achieves an impedance bandwidth of greater than 6 GHz and a gain of greater than 26.8 dBi. The side-lobe level of the pattern at the center frequency is -22.5 dB and -22.4 dB in E-and H- planes, respectively.

This work proposes the edge computing intelligence power module (EC-IPM) with hardware artificial neural network (ANN) current soft sensor (SS) and controller for parallel connected IGBT current distribution to solve the problem of imbalance current. The proposed EC-IPM evolves the technologies of semiconductor power device physics, active gate control, machine learning and field bus. The full prototype of EC-IPM and related test power system were built on Matlab Simulink platform with the realization of hardware algorithm of ANN current SS and controller. The results show that the power system with different current rating EC-IPMs can distribute the proper current to each EC-IPM full-autonomously to suppress the IGBT current unbalance in each EC-IPM within 6.5%, compared to 96% that without the proposed technology in the same scenario. Moreover, the EC-IPM can also extend the electric energy internet of things (IoT) to power device level, especially for upcoming popularization of 5G communication environment.

Aiming at the problem that traditional equivalent modeling method of wind farms has large dynamic errors when there is a large difference in wind speed distribution, this paper proposes a method for equivalent modeling of permanent magnet synchronous generator (PMSG) based wind farms using parameter identification. This method is based on traditional single-machine equivalent model and involves three critical steps. Step 1, performing the trajectory sensitivity analysis of wind turbine generator operation parameters under active output power and the bus voltage to determine the key identification parameters. Step 2, the minimum error of active output power between equivalent model and the actual wind farms is taken as the objective function. Step 3, the improved genetic algorithm (GA) is employed to identify the determined key parameters, so as to obtain the optimized equivalent model by parameter identification. In PSCAD / EMTDC, the dynamic errors between both two equivalent models and actual wind farms under three-phase short-circuit faults are compared, and the proposed method is verified. The result shows that the identification of key wind turbine generator operation parameters can effectively improve the accuracy of single-machine equivalent model of wind farms.

The electromechanical transient modeling and aggregation of large-scale wind farms are the basis for the research on wind farm connected to the grid. In this paper, aiming at traditional aggregation model of wind farms existing large errors, permanent magnet synchronous generators (PMSG) are chosen as the research objects, and proposes a method for electromechanical transient equivalent modeling of PMSG-based wind farms using parameter identification. This method based on traditional equivalent electromechanical transient model of wind farms, performing the trajectory sensitivity analysis on the parameters of the equivalent model to determine the key identification parameters. Then the minimum error of active output power between the equivalent model and the actual wind farm is chosen as the objective function, and the genetic algorithm (GA) is used to identify the key parameters, thereby the optimized equivalent model can be obtained. In PSCAD / EMTDC, the proposed method is verified by comparing the output error between the two equivalent models and the actual wind farm under three-phase short-circuit fault. The result shows that the identification of the key parameters of the equivalent electromechanical transient model of wind farm can effectively improve the accuracy of the equivalent model.

A group of broadband strip-slot radiating structures based on flexible liquid crystal polymer (LCP) are presented and analyzed. One of the designs realized a passband from 26.6GHz to over 40GHz. The proposed structures also have an omnidirectional radiation over +z hemisphere, and a complete ground plane to isolate from components and structures on the other side of the ground. The performance of the antenna when curved is also verified.

Based on the working principle of grid antenna, a miniaturized Ka-band high-gain planar grid antenna is presented. The long lines in traditional grid array antenna are bended to get an antenna unit with smaller size. With dimensions of microstrip line layer as 0.79 λ 0 × 0.72 λ 0 and a substrate thickness as 0.06 λ 0 , the gain is 9.4 dBi at center frequency of 35 GHz, and the maximum gain is high up to 10.0 dBi in the band. The radiation beamwidths at 35 GHz of E-plane and H-plane are 76° and 56° respectively and there are almost no sidelobes. A bandwidth of 5.4 GHz, from 32.5 GHz to 37.9 GHz, equal to a relative bandwidth of 15.4% centered at 35GHz, is obtained. This antenna realizes a higher gain and smaller beamwidth compared to traditional microstrip patch antenna. With a size within one free space wavelength and simple structure, this antenna could be used in different arrays and situations.

A high-gain low-cross-polarization Ka-band planar grid array antenna is presented. Compared with the traditional grid antenna, this antenna removes the side long lines to form open-ended stubs, and the stability of the field and gain is improved. The -10 dB impedance bandwidth is from 34.3 GHz to 35.6 GHz, equal to a relative bandwidth of 3.7% centered at 35GHz. With dimensions of 1.8 λ 0 × 1.0 λ 0 and a substrate thickness of 0.06 λ 0 , the maximum gain in the band is high up to 15.8 dBi. For the special designed feedline, the cross polarization is lower than -42dBi in the whole band. This antenna enjoys the advantages of low profile and simple structure, and could be a good candidate for Ka-band wireless application such as 5G.

A W-band series-fed microstrip patch array based on an optimization of tapering profile is proposed in the article. The proposed array is composed of 16 series-fed radiating patches. Dimensions of these microstrip patches are optimized to generate an array pattern with low sidelobes. The optimization procedure about the patch width tapering is performed by using the differential evolution (DE) algorithm. The post-optimized model is investigated in a three-dimensional full-wave simulator. Simulation results show that the sidelobe level of the series-fed array is below -23.8 dB. In addition, the voltage standing wave ratio (VSWR) in the operation frequency range 92 ~ 98 GHz is below 1.65.

In this paper, a Feedback-MOS (FB-MOS) structure with C-SenseFET (FMC-SenseFET) is proposed. The FB-MOS region is connected to the Sense terminal of the C-SenseFET by the gate-drain short (diode) connection, which provides negative bias for the G2 terminal. When the temperature changes, the positive temperature characteristic of FB-MOS provides negative feedback for the current drift caused by the J-FET region, while the negative bias will change the width of the depletion layer in the J-FET region, which could further suppress the current drift. Compared with normal structure, the M (Current drift coefficient with temperature) of the charging current in the saturated region can be reduced by 53.8%, besides that, the proposed structure can generate a zero current drifting point at various temperatures in the linear region where the sampling function is realized, which could improve the temperature stability of C-SenseFET in two operating modes.