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Grid forming (GFM) control strategy has been increasingly used in grid-connected converters to regulate system frequency and mimic the inertia of synchronous generator. However, the description of its power angle dynamics under large disturbances is still lacking up to date, which may pose great challenges to stable operation and economic configuration of grid-connected converters in the future power system. To overcome the aforementioned obstacle, a Krylov–Bogoliubov–Mitropolsky (KBM) asymptotic method with the perturbation theory is presented first in this article to derive an analytical solution for power angle trajectory under large disturbances. Considering that the antiderivative problem is usually unsolvable due to the complicated perturbation function, a tailored integral method is further proposed to address this problem and simplify the final result, which facilitates the KBM asymptotic method to the analysis and calculation of power angle trajectory. As a result, an explicit and accurate time-domain expression is obtained, and it reveals the quantitative relationships between control parameters and dynamic characteristics, which may provide a good potential for system transient stability analysis and GFM converter design. In the end, the effectiveness and accuracy of the proposed method are verified by both simulations and control-hardware-in-loop experiments. [ABSTRACT FROM AUTHOR]

The medium-voltage dc (MVDC) system are intensely investigated by both industry and academy. However, how to realize a lower power circuit directly fed by MVDC is an important but easily neglected problem, which seriously affects the reliability of the dc system. The current high step-down circuits are mostly suitable for high-power applications, while the circuits for low-power applications are designed case by case. To address the obstacle, a generalized buck-boost type high step-down converter (BHSC) structure is proposed in this article. The submodules of BHSC are derived from basic dc–dc converter. As a result, the features of high modularity, simple structure, and low cost can be obtained, and each submodule operates independently without communication and synchronization to achieve voltage balance. Furthermore, a submodule strategy with Bang-Bang control, instead of hardware modification, is proposed to overcome the limitation of BHSC generality in medium-voltage (MV) and high-voltage (HV) applications, due to the operating current difference in different submodules of the cascaded structure. Therefore, BHSC can be easily extended to MV or HV by increasing the number of submodules. Finally, an experimental evaluation of a 1 kV/80 W prototype converter is presented, which can be applied as auxiliary power supply for high-power converter. [ABSTRACT FROM AUTHOR]

Interior permanent magnet synchronous motor (IPMSM) with back electromotive-force (EMF) based sensorless field-oriented control (FOC) is widely used in medium-high speed applications. Unfortunately, the back EMF is too small to be estimated accurately during low speed operation. Hence, the current-frequency (I–f) control with controllable current vector is used for startup. However, the conventional I–f control is hard to realize the tradeoff between startup speed and load capacity, suffering high-acceleration and high-load startup failure. In this article, a current vector angle controller for sensorless IPMSM startup is proposed to adjust speed-up-stage current acceleration and constant-speed-stage current amplitude with load automatically. The proposed angle controller guarantees the current vector angle close to the maximum torque per ampere angle, which contributes to large startup torque, high operating efficiency and smooth transition from I–f startup to sensorless FOC. Furthermore, the robustness against parameters variation of angle controller is evaluated quantitatively. These theoretical advantages are verified in experiments with a 380 V, 1.5 kW IPMSM. In particular, the experimental results demonstrate that the proposed I–f control realizes full-load startup even with ${\rm{ \pm }}$ 50% flux linkage and ${\rm{ \pm }}$ 30% inductance variation. Furthermore, the startup acceleration auto-adjusts with load to reconcile startup speed and load capacity. [ABSTRACT FROM AUTHOR]

In this letter, an internal electric field shielding layer for high voltage winding of medium voltage high frequency transformer used in a modular cascaded medium voltage solid state transformer is proposed. Without breaking the litz wire insulation layer, the high electric field is effectively shielded by a semiconducting layer and an unclosed copper foil spiral, which are electrically connected together. Not only the electric field in the main wall insulation is uniformed but also the peak value of the internal field is greatly reduced, which will help to achieve lower partial discharge and higher insulation reliability. With this structure, the difficulties of pouring process and electric field estimation for the litz wire winding are both avoid. Finally, a no partial discharge 100 kW medium voltage high frequency transformer prototype with 75 kV base insulation level is built and verified with the insulation tests. [ABSTRACT FROM AUTHOR]

Switching ripple communication (SRC), which modulates the PWM carrier with digital data and takes the switching ripple as a signal carrier, helps power electronic converters to transfer digital data along with power. This article discusses the theory and implementation of SRC technology. It proves that the modulation using square wave and sinusoidal wave carriers is compatible. The fundamental principles of frequency hopping–differential phase shift keying (FH–DPSK) modulation are then analyzed in detail, and an improved FH–DPSK scheme is proposed to suppress output voltage disturbances, thereby maintaining power quality, reducing communication noise, and separating power control and data modulation. Furthermore, to evaluate the reliability of the communication technique, the effect of power conversion on communication is discussed in detail. Finally, a buck converter with a switching frequency of 100/83.3 kHz is set up, and the experiment achieves a 16.7 kbps bit rate using quaternary modulation, demonstrating the correctness of the scheme. [ABSTRACT FROM AUTHOR]

Multichip silicon carbide power modules with integrated snubbers are promising for large-capacity converters with high speed and cost efficiency. In the design stage, the parasitic inductance of module layout generally attracts the primary efforts of designers because of its severe impact on dynamic performance, e.g., voltage overshoot and transient current imbalance. However, due to the complexity of the heterogeneous layout, the solution space and development efficiency are always limited by the traditional manual design approach. Thus, this article proposes a generative method to optimize the layout autonomously. First, a graph model is built to describe heterogeneous layouts with all interconnectivity and design constraints retained. Based on the model, integer programming is introduced to generate layout templates with variable geometric topologies. Then, coupled with a self-developed discrete extractor, the Pareto-front is obtained by genetic algorithm, providing a tradeoff boundary for loop inductance and branch mismatch. The proposed method is systematic, flexible, and requires few designers’ expertise. A 1200 V/240 A half-bridge module is designed and fabricated to validate its capability. The experimental results show that the loop inductance of 5.59 nH is achieved, and less than 5% of the transient current imbalance is realized under 6.2 A/ns turn-on in the rated. [ABSTRACT FROM AUTHOR]

Following the continuous development of wide bandgap (WBG) devices and multilevel converter technology, medium voltage active front ends are becoming promising in future high-power-density and high-power applications. However, the cost issue is one of the major drawbacks, which stops the WBG devices from being widely applied in high-power areas. This article proposes a silicon carbide (SiC) and silicon (Si) hybrid five-level unidirectional rectifier. It requires only four SiC MOSFETs with relatively low blocking voltage and four Si diodes. Meanwhile, by adding snubber capacitors, all the Si devices are with low-speed switching, and the voltage stresses of fast SiC MOSFETs are minimized. In this article, operational analysis and carrier-based phase-disposition pulsewidth modulation scheme for this circuit are discussed in detail. The capacitor voltage balancing and unity power factor are both realized. Simulation and scaled-down experimental results are demonstrated to verify the proposed rectifier. Furthermore, the comparison of the hybrid five-level rectifiers is given to show the advantages of the proposed rectifier in terms of voltage stress, efficiency, and cost. [ABSTRACT FROM AUTHOR]

The stitch wire configuration is widely adopted for large-area IGBT chips. However, an inhomogeneous wire current density introduces uneven self-heating and nonuniform chip heating, which exacerbates the chip thermal stress. In this article, a multicellular electro-thermal model considering the stitch-bonding wires is derived to optimize the wire layout parameters. Furthermore, the current density alleviation of wire bonds is investigated to be the most sensitive and effective method to comprehensively mitigate the thermal nonequilibrium and local overheating. Consequently, an improved multitier layout is proposed to further achieve thermal stress suppression without any additional components and advanced materials. Finally, a triple-tier-bonded IGBT module with optimal design parameters is fabricated to validate the thermal mitigation performance. The prototype experimental results demonstrate that the modeling error is less than 3.0%. The multitier layout decreases the current density by 57.6%, hence, the maximum and average chip temperature are reduced by 21.8% and 12.4%, respectively. [ABSTRACT FROM AUTHOR]