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Walking and balance capabilities can be improved upon using repetitive ankle dorsiflexion exercises. Here we developed two types of pedal switches incorporated with training devices to improve their walking and balance performance of children with cerebral palsy. The first type of pedal switch can be used to operate a home appliance, while the second type of pedal switch can connect them to web games. Pedal switches can be used for home rehabilitation. This randomized controlled trial included patients in the intervention (n = 24) and control (n = 24) groups who completed 15 weeks of ankle training. The experimental group performed ankle dorsiflexion using a pressure-activated pedal switch connected to the web games. The control group performed ankle dorsiflexion exercises using a pedal switch that operated a home appliance (a fan). Standing balance and walking performance were estimated using the Zebris FDM system, a pressure force platform, the Pediatric Balance Scale score, and the 1-minute walk test. The pre- and posttest data were analyzed using analysis of variance and analysis of covariance, which revealed that the intervention group had more significant improvements in sway patterns and balance and walking. The developed facility of a modified pedal switch integrated with web games can achieve better exercise adherence to promote balance and walking performance than that with home appliances. Maintaining motivation in children with cerebral palsy plays a very important role in the rehabilitation process. [ABSTRACT FROM AUTHOR]

This article investigates the influence of resistive protective oxide (RPO) layer density and hot carrier stress (HCS) degradation in n-channel lateral diffused silicon-on-insulator metal–oxide–semiconductor field-effect transistors. At the beginning of HCS at a higher gate voltage (VG), the threshold voltage shifts and subthreshold swing increase, but the ON-state current will still increase abnormally. The drain current and drain voltage (ID – VD) transfer curves indicate that channel resistance or drift region resistance dominates degradation between low-VG and high- VG respectively. It also found different degradation behavior by extracting the resistances at low-VG and high-VG to stress time. In addition, technology computer-aided design (TCAD) software results show maximum impact ionization of high-VG, in which the direction of the electric field is toward RPO, resulting in the injection of holes into RPO during HCS. Finally, the simulated drain current and gate overdrive voltage curves for numerous interface states and numerous oxide traps show that the abnormal ION enhancement is due to the hole trapping in the RPO and the degradation is closely related to the different density of RPO. In this article, we determine the mechanism of HCS degradation and propose methods to optimize high-voltage (HV) device performance and reliability. [ABSTRACT FROM AUTHOR]

This work investigates a low-temperature and high-pressure (LTHP) hydrogen treatment in Si-channel and SiGe-channel metal–oxide–semiconductor capacitors (MOSCAPs). The LTHP hydrogen treatment can repair dangling bonds in the SiO2/Si and SiO2/SiGe interfaces to enhance device performance. Additional parameters of the treatment, including treatment pressure and time, are also investigated to better understand the reaction mechanisms, which further proves the effectiveness and potential of this supercritical fluid (SCF)-based treatment. In addition, this treatment will not damage the front structure and materials due to the relatively low process temperature (120 °C). Therefore, this treatment can be a nondestructive postannealing process. The results of extracting interface defect density (Dit) by the conductance method show that there is an ~51% reduction in the defect density after this posttreatment, a significant decrease. Finally, a TCAD simulation of different defect densities verifies the repair mechanism of deep-level defects. [ABSTRACT FROM AUTHOR]

Fast recovery diodes (FRD) are widely used in transformer circuits for fast switching. Generally, in order to reduce forward voltage to achieve fast switching, the doping concentration is increased to reduce on-state resistance (Ron). This, however, will also increase reverse bias leakage as well as recovery time, resulting in a large amount of excess power consumption. In this letter, we use a unique low temperature supercritical fluid treatment process (LTSCF) to reduce this reverse bias leakage current, without affecting the on-state characteristics or switching characteristics. Experimental results show that the device’s average reverse bias leakage was reduced by 65% after LTSCF. [ABSTRACT FROM AUTHOR]

The generation of defect states in p-MOSFETs under negative bias temperature instability (NBTI) has been extensively discussed in previous literature. However, only a few studies have discussed the relationship between interface defects and off-state leakage. Therefore, this article analyzes the impact of interface defects generated by NBTI on gate-induced drain leakage (GIDL). In general, GIDL is generated through band-to-band tunneling (BTBT) at large gate-to-drain bias (VGD). In this article, NBTI causes an increase in GIDL at extremely low VGD. By measuring at different temperatures and comparing the GIDL generated from hot carrier degradation (HCD), it was confirmed that the GIDL would still be generated through trap-assisted tunneling (TAT) and thermal excitation at an extremely low VGD. [ABSTRACT FROM AUTHOR]

This letter investigates the mechanism of abnormal substrate current ($\text {I}_{\text {sub}}$) after hot carrier stress (HCS) in fin field effect transistors (FinFETs). Traditionally, after HCS, the drain current and $\text {I}_{\text {sub}}$ of the saturation region will continue to decrease. In this work, however, $\text {I}_{\text {sub}}$ first decreased and then exhibited a gradual abnormal rise. This abnormal $\text {I}_{\text {sub}}$ behavior was investigated by different measurement methods and was determined to be due to trap-assisted tunneling. This study first uses different operating voltages to prove the proposed model, then applies a variable temperature stress condition to confirm the model. Finally, a junction current measurement is used to determine the location of defect generation. [ABSTRACT FROM AUTHOR]

Although the existing single-instruction–multiple-data-like (SIMD) accelerators can handle the compressed format of sparse convolutional neural networks, the sparse and irregular distributions of nonzero elements cause low utilization of multipliers in a processing engine (PE) and imbalanced computation between PEs. This brief addresses the above issues by proposing a data screening and task mapping (DSTM) accelerator which integrates a series of techniques, including software refinement and hardware modules. An efficient indexing module is introduced to identify the effectual computation pairs and skip unnecessary computation in a fine-grained manner. The intra-PE load imbalance is alleviated with weight data rearrangement. An effective task sharing mechanism further balances the computation between PEs. When compared with the state-of-the-art SIMD-like accelerator, the proposed DSTM enhances the average PE utilization by $3.5\times $. The overall processing throughput is 59.7% higher than the previous design. [ABSTRACT FROM AUTHOR]

This letter discusses the hot carrier stress (HCS) degradation mechanisms for different gate voltages ($\text{V}_{\textsf {G}}$) in FinFET devices, and finds the abnormal relationship between HCS degradation and body current under high $\text{V}_{\textsf {G}}$. According to the distributions of lifetime (${\tau }$)- $\text{I}_{\textsf {B}}$ and ${\tau }$ -drain current ($\text{I}_{\textsf {D}}$), it is found that the ${\tau }$ under the high $\text{V}_{\textsf {G}}$ is related to the $\text{I}_{\textsf {D}}$ instead of the $\text{I}_{\textsf {B}}$. In addition, as the $\text{V}_{\textsf {G}}$ increases from low to middle to high values, the HCS degradation mechanism exhibits single vibrational excitation, electron-electron scattering, and multiple vibrational excitation (MVE) models, respectively. Therefore, the HCS degradation mechanism at higher $\text{V}_{\textsf {G}}$ is not dominated by the traditional impact ionization but by the carrier concentration of the channel. Finally, according to the results of fitting MVE model, the reason for breaking the Si-H bonds to form dangling bonds is the bending vibrational mode. [ABSTRACT FROM AUTHOR]

This letter investigates an abnormal recovery phenomenon induced by hole injection during hot carrier degradation in silicon-on-insulator n-type metal–oxide–semiconductor transistors. The method by which the hole injection induces the abnormal recovery behavior can be clarified by different hot carrier degradation (HCD) measurement sequences. According to this HCD result, the channel surface energy band is drawn down and the interface defect will be temporarily shielded, an effect caused by the trapped hole. Furthermore, results of different stress voltage experiments indicate that the amount of hole injection is determined by the electric field between the gate and drain. [ABSTRACT FROM AUTHOR]

This letter investigates the role of the TiN gate’s nitrogen concentration on bulk traps in the HfO2 layer in p-MOSFETs using fast I – V measurement. During negative bias temperature instability, the holes trapped in the HfO2 layer will induce V th degradation. The fast I – V double sweep confirms the holes are trapped in process-related pre-existing defects. These defects are interstitial-type, influenced by the nitrogen in the TiN gate diffusing to the HfO2 layer when the device undergoes thermal annealing. Moreover, these nitrogen interstitials increase with increasing TiN gate nitrogen concentration, which induces more holes being trapped in the HfO2 layer. [ABSTRACT FROM PUBLISHER]

This letter investigates the impact of two different TiN capping metal thicknesses on high-k oxygen vacancies in n-MOSFETs. Traditionally, oxygen vacancies in HfO2 can be repaired by nitrogen in the TiN gate, and these repairs become more pronounced as thickness increases. Nevertheless, in this letter, where the thicknesses of the TiN capping metal was less than 30 Å, more oxygen vacancies were found in thick-capped devices than in the thin-capped devices because the repair of oxygen vacancies is dominated by the diffusion of oxygen rather than by the diffusion of nitrogen. [ABSTRACT FROM PUBLISHER]

This letter studies the effects of hot carrier stress (HCS) in laterally diffused silicon-on-insulator n-channel metal–oxide–semiconductor field-effect transistors. After HCS, threshold voltage and subthreshold swing degrade, while the ON-state current exhibits degradation after an abnormal spike due to hole trapping in the resist-protective oxide. Impact ionization simulation shows that low doping concentrations in the drift region cause a severe Kirk effect under HCS and more severe degradation at higher gate voltages. However, degradation in the channel contrasts with the simulation result, which suggests an additional mechanism. Variable temperature HCS confirms that channel degradation is instead dominated by temperature. [ABSTRACT FROM PUBLISHER]

This paper presents a zero-voltage-switching (ZVS) full-bridge dc–dc converter combing resonant and pulse-width-modulation (PWM) power conversions for electric vehicle battery chargers. In the proposed converter, a half-bridge LLC resonant circuit shares the lagging leg with a phase-shift full-bridge (PSFB) dc–dc circuit to guarantee ZVS of the lagging-leg switches from zero to full load. A secondary-side hybrid-switching circuit, which is formed by the leakage inductance, output inductor of the PSFB dc–dc circuit, a small additional resonant capacitor, and two additional diodes, is integrated at the secondary side of the PSFB dc–dc circuit. With the clamp path of a hybrid-switching circuit, the voltage overshoots that arise during the turn off of the rectifier diodes are eliminated and the voltage of bridge rectifier is clamped to the minimal achievable value, which is equal to secondary-reflected input voltage of the transformer. The sum of the output voltage of LLC resonant circuit and the resonant capacitor voltage of the hybrid-switching circuit is applied between the bridge rectifier and the output inductor of the PSFB dc–dc circuit during the freewheeling phases. As a result, the primary-side circulating current of the PSFB dc–dc circuit is instantly reset to zero, achieving minimized circulating losses. The effectiveness of the proposed converter was experimentally verified using a 4-kW prototype circuit. The experimental results show 98.6% peak efficiency and high efficiency over wide load and output voltage ranges. [ABSTRACT FROM AUTHOR]

This paper presents the design of a phase-shifted full-bridge series resonant converter (PS-FB SRC). The proposed FB SRC features a novel two-mode operation. It is operated in series resonant mode at normal loads. The switching frequency is varied to regulate the output voltage. The fixed-frequency phase-shifted pulse width modulation, on the other hand, is used to adjust the effective duty cycle and regulate the output voltage at light loads. The proposed converter exhibits high conversion efficiency for wide-range load conditions. The relationships among the voltage gain, the switching frequency, and the effective duty cycle are discussed and analyzed. Finally, a 48-V/42-A prototype is implemented. Experiments are conducted to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]