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Nitride based light emitting diodes (LEDs) have demonstrated very high efficiency in the blue and green wavelength ranges. For full color LED based displays, efficient and small sized devices emitting in the three primary colors - red, green and blue are required. While phosphide based red LEDs are highly efficient, high surface recombination velocities limit their scaling to small dimensions. Nitride emitters can be scaled to smaller sizes, however for longer emission wavelength such as yellow, orange, and red, the indium content in the active region of the devices needs to be >30%. Due to the large lattice mismatch between GaN and InN, the needed high indium content introduces a large strain in the structure, often resulting in poor material quality. Recently, a novel technique to mitigate this lattice mismatch induced strain was demonstrated with the use of compliant porous GaN underlayer based substrates. In our previous reports, we have discussed the surface morphology, strain state evolution and device demonstrations using these substrates, however a detailed discussion regarding the pore cross-sections and dislocation propagation for each generation of these porous GaN substrates was yet to be reported. In this work, we will discuss the cross-sectional transmission electron microscopy (TEM) results of these substrates across multiple stages of the substrate technology development. [ABSTRACT FROM AUTHOR]

This work presents recent progress in the W-band (94 GHz) power performance of N-polar GaN deep recess HEMTs grown on sapphire substrates. While SiC has been the substrate of choice to achieve the highest level of performance, sapphire substrates are a lower cost alternative. In this work we show that N-polar GaN deep recess HEMTs grown on sapphire match the power performance of a device on SiC up to 14 V with 5.1 W/mm of output power density. At 16 V the device on sapphire starts to suffer from thermal effects but still demonstrated 5.5 W/mm with an associated 20.6% power-added efficiency. This work also examines the impact of encapsulating the device in a low dielectric constant film often used for the implementation of a RF wiring environment. [ABSTRACT FROM AUTHOR]

In this letter, we report the Schottky barrier diode investigation of ruthenium (Ru) deposited by atomic layer deposition on N-polar GaN. The Schottky diodes showed near-ideal thermionic current behavior under forward bias and reverse bias at various temperatures. The barrier height values extracted from both regions agreed well at each temperature and the barrier was extracted to be 0.77 eV at room temperature. The combination of the 0.77 eV barrier and thermionic current characteristic resulted in <2 $\mu \text{A}$ /cm2 reverse current at −5 V, which is a record-low value for N-polar GaN Schottky diodes. As a comparison, the Ru on Ga-polar GaN Schottky barrier diode, which has a barrier height of 1.0 eV, exhibited a ~ two-order of magnitude higher leakage than Ru on N-polar GaN at −5 V due to other parasitic leakage mechanisms. [ABSTRACT FROM AUTHOR]

Though GaN HEMTs have primarily been used for power amplification, they are also well suited for receiver applications. In the front-end of receivers, non-linearities, in particular third-order intermodulation products lead to in-band signal distortion. The intermodulation distortion is primarily dominated by transconductance and its derivatives. In this paper, we report on N-polar GaN MIS-HEMTs able to simultaneously achieve high gain (12.7 dB) and excellent linearity performance (OIP3/PDC of 15 dB) for low-power receiver application at 30 GHz. With a two-tone load-pull input-bias sweep, we demonstrate that the linearity of high performance HEMTs is sensitive to bias, and we present our measurement methodology to accommodate this. [ABSTRACT FROM AUTHOR]

This article reports on the extraction of the electron velocity as a function of gate bias from N-polar GaN deep recess high-electron-mobility transistors (HEMTs) designed for mm-wave power amplification. Bias-dependent small-signal S-parameter measurements are used to obtain small-signal equivalent circuit parameters, which are applied to a transit delay model. The model accounts for fringing capacitance to arrive at an electron velocity associated with the transit of the physical gate length. A peak electron velocity of 1.4 × 107 cm/s was obtained at a drain current of 700 mA/mm corresponding to a channel charge density of 0.3 × 1013 cm−2. At higher current, the velocity slowly decreased with the electron velocity crossing below 107 cm/s at 1.8 A/mm. This behavior was found to be in good agreement with a previously proposed model based on optical phonon scattering at the source injection point. An analysis of the delay components is used to provide guidance for the factors influencing the device performance. [ABSTRACT FROM AUTHOR]

This paper reports on the hot-carrier effects and semi-on-state behavior of nitrogen-polar GaN MIS-HEMTs at cryogenic temperatures (from 300 K down to 100 K). In the semi-on-state $(\text {V}_{\text {G}} \approx -{2}\,\,\text {V})$ , holes are generated by impact ionization in the high field region at the drain-side of the gate-edge. At room temperature, holes overcome the SiN/AlGaN stack and are collected at the gate-terminal, resulting in measurable hole gate-current (~11 nA/mm). Conversely, at cryogenic temperatures, the top SiN/AlGaN stack confines the holes within the GaN channel, thus inducing a negative threshold voltage shift (−0.4 V) and a sharp increase in drain current (0.18 A/mm). This behavior, referred to as “kink,” is readily observable on the $\text {I}_{\text {D}} - \text {V}_{\text {D}}$ characteristics. We demonstrated that the kink is related to impact ionization and follows a non-monotonic behavior maximized in the semi-on-state. Our interpretation is supported by a quantitative analysis based on the latest experimental impact-ionization coefficients available in the literature. [ABSTRACT FROM AUTHOR]

This letter reports on the improvement of the large-signal W-band power performance of nitrogen-polar gallium nitride deep recess high electron mobility transistors with the addition of a 40-nm-thick ex-situ silicon nitride passivation layer deposited by plasma enhanced chemical vapor deposition. The additional passivation improves the dispersion control allowing the device to be operated at higher voltages. Continuous-wave load pull measurements performed at 94 GHz on a $2\times 37.5\,\,\mu \text{m}$ transistor demonstrated an improvement in the peak power-added efficiency (PAE) to 30.2% with an associated output power density of 7.2 W/mm at 20 V drain bias. Furthermore, at 23 V, a new record-high W-band power density of 8.84 W/mm (663 mW) was achieved with an associated PAE of 27.0%. [ABSTRACT FROM AUTHOR]

In this letter, we report on the demonstration of a Mg-doped GaN/Al0.2Ga0.8N superlattice (SL) based depletion mode p-channel FinFET to improve the on current (ION). A two-step approach involving a dry etch followed by a Tetramethylammonium hydroxide (TMAH) wet etch was employed to obtain fins with minimum width of 50 nm using optical lithography. Normalizing current with fin height, an ION of 52 mA/mm and 110 mA/mm were achieved for 80 and 105 nm wide fins respectively. [ABSTRACT FROM AUTHOR]

This letter reports on the dynamic $R_{\text{ON}}$ performance of large-area GaN vertical trench MOSFETs (OG-FETs) fabricated on bulk GaN substrates. OG-FETs demonstrated excellent DC performance with a breakdown voltage of 900 V and a $R_{\text{ON}}$ of 4.1 $\Omega$ (8.2 $\text{m}\Omega \cdot \text {cm}^{2}$ ). However, damage to the trench sidewalls caused by RIE dry etching led to poor dynamic $R_{\text{ON}}$ performance. An improved dynamic $R_{\text{ON}}$ performance was achieved by following the RIE dry etch with a TMAH wet etch. With this process combination, the dynamic $R_{\text{ON}}$ was reduced by more than 10 times compared with the dynamic $R_{\text{ON}}$ in devices fabricated by dry etch only. [ABSTRACT FROM AUTHOR]

Nitrogen polar (N-Polar) GaN high-electron-mobility transistors (HEMT) targeting high-voltage switching applications were fabricated on epi-layers grown by metal-organic chemical vapor deposition on sapphire substrates. Devices demonstrated a combination of high breakdown voltage and low dynamic ON-resistance. Breakdown voltages of over 2000 V were observed on transistors with ${L}_{G}=\text {1}\,\,\mu \text{m}$ , ${L}_{{\text {GS}}}=1\,\,\mu \text{m}$ , and ${L}_{{\text {GD}}}=28\,\,\mu \text{m}$. These devices had a drain current density of ~ 575 mA/mm at ${V}_{{\text {GS}}}=1$ V, and the specific ON-resistance (active-area) was $ {4}~\text {m}\Omega \cdot \text {cm}^{2}~(10~\Omega \cdot \text {mm}$ ). Dynamic ON-resistance ( ${R}_{ \mathrm{\scriptscriptstyle ON}}$ ) was characterized $\text {5}~\mu \text{s}$ after the device was turned ON, with up to 575-V OFF-state stress. At ${V}_{{\text {DS}}, {Q}} = \text {575}$ V, the dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ was ~1.4 times the static ${R}_{ \mathrm{\scriptscriptstyle ON}}$ (40% increase). These transistors showed an ultra-low dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ of ~5% when measured at 450-V stress. As one of the first demonstrations of N-Polar GaN HEMTs for power switching applications, the devices discussed in this letter achieve excellent ${V}_{ \mathrm{\scriptscriptstyle BR}}$ and dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ performance comparable to (and in most cases better than) the state-of-the-art Ga-Polar GaN HEMTs reported in the literature. [ABSTRACT FROM AUTHOR]

This letter reports on the observation of hot-electron and impact-ionization mechanisms in N-polar GaN-based MIS-HEMTs designed for high frequency (RF) operation. Thanks to the extremely low gate leakage of such devices, we were able to demonstrate—for the first time—a correlation between electroluminescence (EL) and gate current in the semi-on state. In the semi-on state, the devices show a non-monotonic, bell-shaped behavior of the EL-versus- ${\text {V}}_{\text {GS}}$ and of the ${I}_{\text {G}}$ -versus- ${V}_{\text {GS}}$ characteristics, and the intensity of the EL signal is proportional to the ${I}_{G}\times {I}_{D}$ product. The results are experimental evidence for impact ionization: the related mechanisms are described in detail in the letter. [ABSTRACT FROM AUTHOR]

We present a large-area in-situ oxide, GaN interlayer-based vertical trench MOSFET (OG-FET) with a metal organic chemical vapor deposition regrown 10-nm unintentional-doped-GaN interlayer as the channel and 50-nm in-situ Al2O3 as the gate dielectric. The threshold voltage of the device on bulk GaN substrate was 1 V measured at $\text{I}_\mathrm {on}/\text{I}_\mathrm {off}= 10^{7}$. The OG-FET with an area scaled to 0.2 mm2 demonstrated a breakdown voltage ( $\text{V}_\mathrm {BR}$ ) of 320 V and an on-state resistance ( $\text{R}_\mathrm {on}$ ) of $3.8~\Omega $ (specific on-state resistance: $\text{R}_\mathrm {on,sp}= 7.6\,\,\text{m}\Omega \,\,\cdot $ cm2). For the single unit cell OG-FET from the same sample, $\text{V}_\mathrm {BR}$ was as high as 700 V (measured at $\text{V}_\mathrm {GS}=-10$ V), corresponding to a breakdown electric field of 1.4 MV/cm and $\text{R}_\mathrm {on,sp}$ of 0.98 $\text{m}\Omega ~\cdot $ cm2. On our control sample, which was grown on sapphire substrate, a 1-A current was measured as well. These results show the potential of the OG-FET in power conversion applications. [ABSTRACT FROM AUTHOR]

This letter presents an analysis of N-polar metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with a 40 nm MOCVD SiNx passivation and a trench-gate design. A device with a 50 nm gate-length (Lg) demonstrates a 313 GHz power gain cutoff frequency (fmax) at a quiescent drain bias (V $_{{DS,Q}} ) of 26 V. The high fmax\cdot VDS,Q of 8.1 THz \cdot V exhibits great potential of the device in high-frequency power applications. Investigation on small-signal parameters shows that fmax improves with V $_{{DS,Q}}$ due to a reduction of gate-drain capacitance (cgd) and an increase of output resistance (rds). When comparing with the previously reported planar HEMT design, the shorter Lg enabled by the trench-gate design enhances the intrinsic current gain cutoff frequency (f $_{{T,int}}$ ) leading to a higher peak fmax at a higher V $_{{DS,Q}}$ . [ABSTRACT FROM PUBLISHER]

Impact ionization has been seen to effect pinchoff in wafer-bonded aperture vertical electron transistors (BAVETs) comprising an InGaAs channel wafer-bonded to a III-nitride (III-N) drift region. The InGaAs-III-N junction is referred to as the wafer-bonded interface (WBI). Field plating can work well to manage the peak field and related impact ionization; however, it comes with a tradeoff of increased on resistance. In this paper, another control knob to breakdown is explored in the critical field (ξCRIT_IMPCT) of a BAVET. Investigation focuses on the characteristics of devices that differ in their InAlAs doping profile, namely p-type, unintentional, or a combination of both. These devices are tested for the role of field plate, built-in voltage, and trap behavior on pinchoff. It is shown that the change of doping causes a dramatic change to the trap activity at WBI. These traps ionize and determine ξCRIT_IMPCT as ionization of traps that leads to an early onset of impact ionization in the channel, which weakens pinchoff in a BAVET. Passivating traps is proposed to be a method to improving pinchoff. Trap passivation of WBI is demonstrated if InAlAs is doped p-type rather than unintentionally. A consequent enhancement in pinchoff and breakdown voltage of a BAVET is also reported. [ABSTRACT FROM AUTHOR]

This paper reports on state-of-the-art millimeter-wave power performance of N-polar GaN-based metal–insulator–semiconductor high-electron-mobility transistors at 30 and 94 GHz. The performance is enabled by our N-polar deep recess structure, whereby a GaN cap layer is added in the access regions of the transistor to simultaneously enhance the access region conductivity while mitigating dc-to-RF dispersion. The impact of lateral scaling of the drain access region length is examined using the tradeoff between breakdown voltage and small-signal gain. Load-pull measurements are presented at 94 GHz, corresponding to the target device operating frequency in W-band, where the device demonstrated a peak power-added efficiency (PAE) of 28.8% at 16 V and record-high maximum output power density of 8 W/mm at 20 V. Additional load-pull measurements at 30 and 10 GHz demonstrate the viability of this device across a wide frequency range where the peak power remained constant at 8 W/mm and with peak PAEs of 56% and 58%, respectively. [ABSTRACT FROM PUBLISHER]

Gate dielectric plays an integral role in advancing the performance and reliability of GaN-based transistors. Si-alloying of aluminum oxide (Al2O3) dielectrics have been shown to provide a promising route to improve gate dielectric properties in GaN. In this letter, we report on the first demonstration of a GaN FET with aluminum silicon oxide (AlSiO) as the gate dielectric. Vertical normally-off GaN MOSFETs were fabricated on bulk GaN substrate. Excellent dc performance was achieved with a breakdown voltage of 1.2 kV, an ON-resistance of 2 \textm\Omega .cm2, and a threshold voltage of 1.5 V (defined at I\textsf {DS} =1\,\,\mu \text{A} /mm). A high breakdown electric-field of 2.3 MV/cm was calculated in these devices. In addition to vertical GaN MOSFET results, a comparative study of Al2O3 and AlSiO-based in situ GaN MOS capacitors, including time-dependent dielectric breakdown characteristics is also presented. [ABSTRACT FROM AUTHOR]

In this letter, we have examined the impact of trench dimensions on the breakdown voltage and ON-resistance of trench MOSFETs fabricated on sapphire and bulk GaN substrates. Contrary to simulation studies, the breakdown voltage decreased with an increase in trench dimensions in devices fabricated on sapphire substrates. However, such breakdown voltage dependence with trench dimensions was not observed in devices fabricated on bulk GaN substrates of the same area. The observed trend on GaN on sapphire devices was associated with the equivalently reduced number of dislocations per device area. These results give an insight into how dislocations could affect breakdown voltage in power MOSFETs. [ABSTRACT FROM AUTHOR]

A novel N-Polar GaN cap (MIS)high electron mobility transistor demonstrating record 6.7-W/mm power density with an associated power-added efficiency of 14.4% at 94 GHz is presented. This state-of-the-art power performance is enabled by utilizing the inherent polarization fields of N-Polar GaN in combination with a 47.5-nm in situ GaN cap layer to simultaneously mitigate dispersion and improve access region conductivity. These excellent results build upon past work through the use of optimized device dimensions and a transition from a sapphire to a substrate for reduced self-heating. [ABSTRACT FROM PUBLISHER]

In this letter, a novel device design to achieve both low ON-resistance and enhancement mode operation in a vertical GaN FET is demonstrated. In the traditional trench MOSFET structure, a dielectric is deposited on an n-p-n trenched structure and the channel forms via p-GaN inversion at the dielectric/p-GaN interface. However, this results in a relatively high ON-resistance due to poor electron mobility in the channel. By changing the structure to include a metal-organic chemical vapor deposition (MOCVD)-regrown Un-intentionally Doped (UID)-GaN interlayer followed by an in-situ dielectric (MOCVD Al2O3) cap on the n-p-n trenched structure, a pathway (channel) for enhanced electron mobility is created, resulting in reduced ON-resistance. Preliminary results for this device design demonstrated almost 60% reduction in the ON-resistance and similar breakdown voltage compared with a traditional trench MOSFET structure while maintaining normally off operation with a threshold voltage of 2 V. [ABSTRACT FROM PUBLISHER]

W-band power performance is reported on an N-polar GaN HEMT for the first time, resulting in a record output power density for any GaN device on a sapphire substrate. This result is achieved using an N-polar GaN deep recess MISHEMT structure grown by metal-organic chemical vapor deposition on the sapphire substrates. The key component in this device design is the addition of an in situ unintentionally doped GaN epitaxial passivation layer in the access regions of the transistor. This GaN layer functions both to control DC-to-RF dispersion as well as to increase the conductivity in the access regions of the HEMT. Devices with very low dispersion and a simultaneous f\text {max}/ft combination of 276/149 GHz are demonstrated. Load pull measurements at 94 GHz give a peak power added efficiency (PAE) of 20% with an associated output power density of 1.73 W/mm at V\text {DS} = 8 V. A record 2.9-W/mm maximum output power density with an associated 15.5% PAE at V\text {DS} = 10 V is achieved despite the low thermal conductivity of the sample’s sapphire substrate. [ABSTRACT FROM PUBLISHER]

Nitrogen polar SiNx/AlGaN/GaN/AlGaN metal– insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) with 28.6-nm equivalent GaN channel thickness grown by metal–organic chemical vapor deposition on sapphire substrate with a high combination of current/power gain cutoff frequencies ( fT/f\max ) and three-terminal breakdown voltage (BVDS) are demonstrated. fT /BVDS of 103 GHz/114 V and f\max /BVDS of 248 GHz/114 V were achieved in devices with the gate widths of 2 \times 50\mu \textm and 2 \times 25\mu \textm , respectively, comparing well with recent reports of fully passivated and vertically scaled Ga-polar GaN HEMTs. Devices with a gate width of 2 \times 75 \mu \textm showed the peak output power densities of 5.74 W/mm at 4 GHz and 6.29 W/mm at 10 GHz obtained by load-pull measurements. [ABSTRACT FROM PUBLISHER]