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The impact of a thin SiO2 layer inserted between Al2O3 and SiC on channel mobility in Al2O3/SIC MOSFETs was investigated. The remarkable increase in the channel mobility is demonstrated when the SiO2 thickness is around 1 nm. The thin SiO2 layer is formed by the thermal oxidation of the SiC substrate at 600 or 800 °C in O2 atmosphere. The peak value of the field-effect mobility in Al2O3/SiO2/SiC MOSFETs is as high as 300 cm²/(V s). On the other hand, when the SiO2 layer is 2.0 nm, the field-effect mobility drastically reduces to 40 cm²/ (V. s), which is most likely due to the high interface trap density as seen in conventional SiO2/SiC MOSFETs. [ABSTRACT FROM AUTHOR]

This paper reports a 21.5-dBm power-handling 5-GHz transmit/receive CMOS switch utilizing the depletion-layer-extended transistor (DET), which possesses high effective substrate resistance and enables the voltage division effect of the stacked transistor configuration to work in the CMOS switch. Furthermore, low insertion losses of 0.95 and 1.44 dB are accomplished at 5 GHz in the transmit and receive modes, respectively, with the benefit of the insertion-loss improvement effects in the DET. At the same time, high isolations of more than 22 dB were obtained at 5 GHz in the transmit and receive modes with the adoption of the shunt/series type circuit. [ABSTRACT FROM AUTHOR]

Direction detection of a magnetic field by spin-valve-type magnetic tunnel junction (MTJ) has been investigated at temperatures ranging from room to 150°C, concentrating on the magnetic property of the pinned layer. Angular dependencies of resistance curves show that detection errors from cosine curve increase with rising temperatures in MTJ with the IrMn/CoFe pinned layer. Measurements of the magnetization curves of the pinned layer found that detection errors are caused by rotation of the pinned layer magnetization. Direction detection of a magnetic field by MTJ with a IrMn/CoFefRu/CoFe of synthetic antiferromagnetic (SyAF) pinned layer, in which magnetizations of two CoFe layers nearly cancel each other, was also investigated. We confirmed that the pinned layer of SyAF structure in MTJ effectively reduces the dependence of detection errors on temperature. [ABSTRACT FROM AUTHOR]

Examines the rapid-gate-length scaling in a CMOS process. Realization of an adequate insertion loss; Utilization of high-performance 1.8-v low-voltage operation transistors; Integration of a power amplifier operating in a power range.