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Combination of cognitive mm-Wave MIMO Phased Array systems with Optical Sensing solutions is proposed toward new functionalities for environmental perceptions and ubiquitous interactions. The resulting paradigms will operate the unification of mm-Wave and optical sensing solutions for enabling emerging technologies relative to interactions of humans with smart devices and systems in randomly changing environments. Perspectives for Autonomous Vehicles with Advanced Driver Assistance Systems (ADAS) including Gesture-Recognition (GR) through ubiquitous interactions based on hybrid cognitive mm-Wave RFIC technologies and optical systems are drawn. Several hardware realizations of mm-Wave phased-arrays are built and co-assembled with optical systems for smart data fusion and real-time co-array signal processing for autonomously secure decision making process. Unified modeling and measurement platform is proposed with the concept of Multi-Physics (EM-Thermal-Mechanical) Numerial-Co-Simulation-Clone (NCSC), seen as the counter-part of the functional hardware, which enables 4D (space-time evolution) Virtual Prototyping (VP) of augmented reality.

The variation of the linear inductance of a CPW with the frequency is used to extract the effective permeability that depends on the metallic losses. The result allows to separate the dielectric and metallic losses and to calculate some characteristics of the waveguide.

In this paper, hot carrier injection mechanism effect on DC and RF performances of n-channel transistors of a 0.25μ CMOS technology in function of gate-source voltage are investigated using an in-house reliability simulation tool. The study concludes that after 10 years of DC stress, transistors present about 50% decrease of linear drain current, a 40% decrease of saturation drain current, as well as a reduction of 95% in transconductance and 90% in the transition frequency. Last but not least, the threshold voltage is increased by 0.55 V after stress. Predicted results are compared to hot carrier model in order to validate the accuracy of the simulator. Reliability analysis is extended to circuits' degradation under hot carrier mechanism to raise awareness of circuit-level reliability simulation interest. A comparison between two typical current mirrors circuits behavior after hot carrier stress has been made.

A reliability study under high RF power stressing was conducted on two SiGe cascode Low Noise Amplifiers (LNA) using an in-house reliability tool. The first LNA was stressed at 19 dBm of RF power during 600 hours. Obtained results (relative degradation values in dB) showed a decrease of 11% in the small-signal gain (S 21 ), while the second was stressed at 20 dBm of RF power during non-stop 600 hours. The results, under these conditions, showed a decrease of 12% in the S 21 and an increase of 13.8% in the Noise Figure (NF). All predictive degradation simulations were compared to measurements demonstrating a satisfactory agreement.

In this contribution, impact of extreme environmental conditions in terms of energy-level radiation of protons on SiGe integrated circuits is experimentally studied. Canonical representative structures including linear (passive interconnects/antennas) and non-linear (Low Noise Amplifiers) are used as carriers for assessing impact of aggressive stress conditions on their performances. Perspectives for holistic Modeling and Characterization approaches accounting for various interaction mechanisms (substrate resistivity variations, couplings/interferences, drift in DC and RF characteristics, for actives are down to allow for optimal solutions in pushing SiGe technologies toward applications with harsh and radiation-intense environments (e.g., Space, Nuclear, Military). Specific design prototypes are built for assessing mission-critical profiles for emerging RF and mm-Wave applications.

International audience; This paper teaches the way full-wave modelling methodology that has been considered for nMOS switch in BiCMOS technology process. A method mixing both RC extraction based method, in combination with Electromagnetic 3D FEM simulations is presented. This method allows a physical full-wave extraction of the substrate taking into account both shallow and deep trenches isolation. Partitioning methodology which is really key in that case is described keeping in mind its compatibility with commercial automated design flows. To support theoretical investigations, 2-ports S-parameters measurements are compared with simulated data obtained from the proposed method. From available results, a good correlation is obtained on both input and return losses (amplitude + phase) over a wide frequency range (up to 10 GHz). Parameters such as Coff and Ron are also compared and FOM (Figure Of Merit) is also issued. Typically a difference less than 50 mdB is obtained for insertion losses. © 2016 European Microwave Association.

Anisotropic Liquid Crystal Polymer (LCP) substrates are used to design 3D conformal antenna elements and filtering structures in Laser Direct Structuring technology (LDS) for applications including 5G connected objects and massive Internet of Things (IoT): e.g., wearable (smart watches/rings), mobile (smartphones/tablets), home (appliances/lighting) devices. Based on the experimentally extracted optical absorption and refraction properties, identification of chemical and/or morphologic composition of the characterized samples (solid and liquid materials) are targeted. Perspectives for macro-modeling of composite materials and nano-Particles using homogeneization techniques are drawn.

In this paper, we are interested on studying the Multi-Transmission Lines, the analysis is ensured by the Finite Difference Temporal Domain FDTD method combined with the absorbing boundary conditions (ABC) to predict the current and voltage behavior resulting from the electromagnetic fields all along lines. Simulated results will be compared to commercial software to validate the proposed algorithm.

SiGe BiCMOS design solutions for Lange Couplers operating in the mm-Wave domain are proposed. Various circuit topologies are designed, fabricated, and experimentally compared in terms of their RF performances. Effect of grounding strategies and influence of DTI pattering are studied both for CPS and CPW topologies to evaluate dependence of obtained RF performances on Die back-side grounding strategies. Perspectives for feasibility of distributed Chip-Package-PCB Co-integration of Lange coupler devices are drawn for loss reduction and improved matching to external input sources and antennas.

In this paper, modeling and experimental characterization of bond-wire arrays are proposed based on dedicated pilote carriers designed and fabricated for RF and microwave applications. Effects of the number of wire elements, connected in parallel to build bond-wire arrays, on the values of extracted broadband parasitics are investigated. Physical characterization of molding compound materials is proposed for their structural analysis and for broadband extraction of their dielctric properties (complex permittivity). Influence of molding compound properties on extracted parasitics of bond-wire arrays is highlighted.

SiGe BiCMOS design solutions for Lange Couplers operating in the mm-Wave domain are proposed. Various circuit topologies are designed, fabricated, and experimentally compared in terms of their RF performances. Effect of grounding strategies and influence of DTI pattering are studied both for CPS and CPW topologies to evaluate dependence of obtained RF performances on Die back-side grounding strategies. Perspectives for physics-based broadband equivalent circuit model extraction are proposed for lumped elements implementation of Lange Couplers using custom variation-aware RLC library elements.

This paper presents an original concept of a 3D-PICS High density Integrated Passive Device Technology with P+ guard rings realized in a 300µm depth High Resistivity Silicon Substrate (HRS) in order to reduce significantly the substrate noise coupling. In this paper, a 3D-PICS IPD test chip was studied as the passive part prototype of a System-In-Package chip in combination with RF transceiver operating in the ISM band (863–870 MHz). Various configurations of the passive chip layout (including implementation of guard rings) have been characterized by Direct Power Injection. 3D-PICS electrical performances deduced from two-ports S-parameters are reported, as well as the guard rings efficiency measurements and a compact high frequency model based on S-parameters extraction. Coupling isolation performances of the new integrated PICS components are found satisfactory.

After the measurement of the S-parameters and the noise power at the output of an HBT, the impedance matrix and the correlation impedance matrix are calculated. A very simple equivalent circuit is used. All the elements and the noise source characteristics are deduced from these matrices.

As global consumption of mobile network is increasing, 4G base station must be designed in a context of improvement in power efficiency. This article presents a new concept of managing the DC-to-DC converter supplying power amplifiers in base stations, targeting a factor two reduction in power consumption. This new concepts provide new specifications for base stations but also for DC-DC converter. Details of the concept and the practical implementation of a 500 kHz and zero to 112W buck converter are discussed. Losses are analyzed and dynamic response is discussed. The prototype achieves 94% power efficiency and a good stability over the complete power range.

Despite the constant improvement in power efficiency of macro-cell base stations, the continuous capacity expansion increases considerably the global power consumption of the mobile network. This article presents a new concept of managing the DC-to-DC converter supplying power amplifiers in base stations, targeting a factor two reduction in power consumption. Details of the concept and the practical implementation of a 500 kHz and zero to 112W buck converter are discussed. The prototype achieves 94% power efficiency and a good stability over the complete power range.

This article presents a new problematic in DC-to-DC converter realized for 4G macro cell base station with efficiency improvement concepts. These concepts from EARTH project target a factor two reduction in 4G base station power consumption. The concepts are presented and detailed. DC-to-DC converter specifications needed are discussed. A practical implementation of a 500 kHz and zero to 112W buck converter is presented. The prototype achieves 94% power efficiency and a good stability over the complete power range.

This paper presents the design and experimental characterization of High-Quality varactors and Schottky Diodes in SiGe:C Technology. A new layout topology for differential varactor is proposed to significantly improve its quality factor up to the Ka band. This new layout topology addresses the typical trade-off that designers often face between the quality factor and the tuning range. 2x improvement of the quality factor up to 30 GHz over conventional layout topology made of multi fingers is demonstrated. On the other side, special care has been taken to minimize parasitic capacitance between anodes to keep the tuning range stable. Measured VCO with this new type of varactor shows a reduction of 2 dB in the Phase Noise at 1 MHz from the carrier. Silicon-based Schottky Diodes arrays with Cut-Off frequencies in the THz domain are designed and fabricated. Concurrent optimization of Schottky Diode arrays geometry and electrical performances (Cutoff frequency, parasitic, Quality-factor, Sensitivity, Responsiveness, etc.) is carried out based on careful modeling and experimental characterizations. Analysis of the Schottky Diode arrays including sweep in DC-biasing conditions to control non-linearities is studied. Detection mechanisms related to the non-linear behavior are studied and figures of merit are introduced for their analysis.

This paper presents a new microwave wideband controlled variable attenuator designed in a BiCMOS process. This variable attenuator is implanted as part of a microwave Built-In-Self-Test (BIST) circuit. The proposed BIST cell is dedicated for direct low cost measurement of the gain and the input 1dB compression point (CP1) of a K-band satellite reception chain (18.2 GHz-22 GHz). The simulation of the controlled variable attenuator with RLCk parasitic extraction shows that it can operate up to 100 GHz with a consumption of 4 mA, an area less than 0.009 mm2 excluding pads and a gain range of 36 dB when the attenuator is alone and 17 dB when it is concatenated to the other blocks. This result was confirmed with the performed measurement on the BIST device. This BIST circuit gives new perspectives in term of test strategy, cost reduction and measurement accuracy for mm-wave integrated circuits.

The noise parameter measurement needs to be faster and faster. So, we need to use a simple and reliable method. The method that we propose here uses only a network analyzer and few passive impedances placed at the input of the DUT. We describe only the determination of the receiver gain. The determination of the other parameters is more conventional.

This paper presents an original concept of a P+ guard ring realized in a 300μm depth High Resistivity Silicon Substrate (HRS) in order to reduce the substrate noise coupling in a 3D-PICS Integrated Passive Device technology. Guard rings have been designed to be a reliable and efficient protection against noise signals propagation. Case study presented in this work illustrates its significant role. In this paper, a 3D-PICS IPD test chip was studied as a first passive part prototype of a System-In-Package chip in combination with RF transceiver operating in the ISM band (863-870 MHz). Various configurations of the passive chip layout (including implementation of guard rings) have been characterized by Direct Power Injection. 3D-PICS electrical performances deduced from two-ports S-parameters are reported, as well as the guard rings efficiency measurements extracted from these S-parameters. Coupling isolation performances of the new integrated PICS components are found satisfactory.

This paper presents an original concept of a P+ guard ring realized in a 300μm depth High Resistivity Silicon Substrate (HRS) in order to reduce the substrate noise coupling in a 3D-PICS Integrated Passive Device technology. Guard rings have been designed to be a reliable and efficient protection against noise signals propagation. Case study presented in this work illustrates its significant role. In this paper, a 3D-PICS IPD test chip was studied as a first passive part prototype of a System-In-Package chip in combination with RF transceiver operating in the ISM band (863-870 MHz). Various configurations of the passive chip layout (including implementation of guard rings) have been characterized by Direct Power Injection. 3D-PICS electrical performances deduced from two-ports S-parameters are reported, as well as the guard rings efficiency measurements extracted from these S-parameters. Coupling isolation performances of the new integrated PICS components are found satisfactory.

This paper presents the influence of the harmonic networks of class F and inverse F power amplifiers (PAs) in the LINC (LInear amplification using Non-linear Components) transmitter architecture. The analysis and design of these classes with CHIREIX combiner are realised using Agilent ADS software. We use for this work a GaN HEMT transistor from Cree. Performances of the system are evaluated using a 16QAM modulation at 900MHz with 5.63dB Peak-to-Average Power Ratio (PAPR). This study shows the advantages and drawbacks of even/odd harmonics in drain curves of these PA classes as well as the tradeoff linearity-efficiency for the LINC architecture.

The scanning acoustic microscopy (SAM) is widely used today by the manufacturers and researchers in failure analysis labs to improve the microelectronic devices reliability. The goal is to detect and locate flaws inside chips using non destructive test (NDT). New packaging technologies improve the number of layers in a single package using advancing formats including for example flip chip, ball grid array and thereby increasing the number of interfaces to study. This paper deals with the automatic detection of small flaws in the z-axis to reduce time of experiment and facilitate the localization of the flaws especially in solder bump joints and underfill.

This paper discusses concept and feasibility of wireless BIST probing for non-contact measurement and characterization. Inter-Chip noise interferences as function of wireless coupling-path attributes (wireless separation distance between emitter and receiver chips, injected power levels, Charge-Pump-Current) are characterized. Study of BIST for reconfigurability of on-chip functions is investigated based on design of programmable automatic oscillation amplitude control of PLL reference oscillators. Impacts of BIST circuits on system performances are evaluated based on simulation analysis and experimental verifications.

International audience; We propose a methodology to extract models for inductors from measurements. The methodology is applied to a one-turn solenoid and to spiral inductor.

Linear amplification using nonlinear components (LINC) is an architecture that achieves linear power amplification for radio-frequency (RF) transmitters. This paper presents an analysis of the sizing of a Chireix coupler used in this architecture. The objective here is to find the optimum combiner topology so that the best compromise between power efficiency and linearity can be achieved. As this compromise depends on the class of the power amplifier (PA) we focused our work, for this study, on an overdriven class − AB PA and a class − F PA. Both transmitters are evaluated using a 16QAM digital modulation.

The noise parameters are useful for the design of low noise amplifiers. They are usually deducted by the measurement of the noise figure that varies with the impedance presented at the input as in Eq. 1. F= F MIN + R N over ∜ Y S |Y S − Y OPT |2 (1) where Y S is the admittance presented at the input and Y OPT is the admittance for which the noise figure has its lower value F MIN . R N is the noise resistance that characterizes the sensitivity to the variation of the impedance. Many optimization methods [1] have been developed in order to reach F MIN , R N and Y OPT from many measurement points.

A new equivalent circuit suitable for transient simulation methodology of Gate-Grounded NMOS transistor (ggNMOS) used in Electrostatic Discharge (ESD) protection circuits is proposed in this paper. The target technology is a classical CMOS 0.25 μm. This model, contrary to classical I-V static model, is intended to cover the dynamic comportment of the ggNMOS during all the phases of the Transmission Line Pulse (TLP) stress tests. Starting from experimental TLP measures concerning the transient ggNMOS triggering, it is demonstrated that the modeling can be based on a classical equivalent circuit. The parameters extraction methodology for the model, relied to the physical structure of the component is also presented. Finally, simulation results are presented and compared with experimental data. The model is then correlated to the simplified physical structure of the device. By example for a ggNMOS W/L=3D50μm/0.5μm the transient characteristics for TLP current of 0.3 and 0.7A created by simulating the model are the same as the one measured on the TLP tester thus validating the model.

This paper presents experimental results of removing on-wafer microwave measurements parasitic elements due to RF probes pads and interconnects using Time Domain Gating method up to 110GHz. This approach has been tested on transmission lines processed using metallization layers of NXP RF BiCMOS technology and compared with the classical OPEN/SHORT de-embedding method. The limitations and the ways to improve this technique are shown.

Experimental data obtained during irradiations of a COTS (commercial off the shelf) CCD are presented. Monoenergetic protons from 17 MeV to 200 MeV are used. We studied transient noise induced by the localized ionizing of the particle. The SET (single effect transient) is measured during irradiation. We report on the irradiation experiments. The evolution of the generated signal versus protons LET is linear.

Our case study has shown the efficiency of isolating failing sites (shorts, opens) in IC packages using TDR and especially sequential comparative TDR analysis, which allowed to overcome some of TDR hardware limitations and to identify the different regions of the DUT. Currently, it's possible to increase the bandwidth of the main standard TDR sources available on the market up to 70 GHz, but the main limitation is due to TDR probes which best bandwidth only reaches 20 GHz. Anyway, TDR technique has already proved to definitively take up its own place in the non-destructive failure analysis flow of FA labs beside SCAT and x-ray ones for most of common IC packages used in semiconductors industry.

Magnetic field based techniques have shown great capabilities for investigation of current flows in ICs. After reviewing the performances of SQUID, GMR (hard disk head technologies) and MTJ existing sensors, we present results obtained on various case studies. This comparison shows the benefit of each approach according to each case study (packaged devices, flip-chip circuits,...). Finally we discuss the obtained results to classify current techniques, optimal domain of applications and advantages.

We present SESUB (Semiconductor Embedded in Substrate) and WLCSP (Wafer-Level-Chip-Scale Packaging) integration of Power Combiners for WLAN and 5G applications. The proposed technology solutions offer optimized Electromagnetic-Thermal-Mechanical performances for Energy-Efficient Chip-Package-PCB distributed Co-Design. PDK-Library oriented RLC Lumped-model topologies are compared to broadband distributed Layout design. Prototype demonstrators are designed and experimentally verified for emerging 5G and IoT applications both for frequencies below 6GHz and in the mm-Wave domain (28GHz, 39GHz). Innovative broadband physics-based RLC equivalent circuit models valid from DC to mm-Wave frequencies is proposed and verified against measurement.

Hybridization of agile mm-Wave MIMO and Phased-Array technologies with static (Capacitive-Resistive-Inductive effects) and dynamic multi-physics (coupled ultrasonic and optical waves) sensing solutions is proposed toward new functionalities for environmental perceptions and ubiquitous interactions. The resulting paradigms will operate the unification of Contact-driven actions and contactless Gesture-driven interactions for enabling emerging technologies relative to interactions of humans with smart devices and systems in randomly changing environments. Perspectives for Autonomous Vehicles with Advanced Driver Assistance Systems (ADAS) including Gesture-Recognition (GR) through ubiquitous interactions based on hybrid agile mm-Wave RFIC technologies and optical systems are drawn.