113 results on '"Ross, Ann"'
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2. Machine Learning-based Prediction for Dynamic Architectural Optimizations
3. Machine Learning-based Prediction for Dynamic, Runtime Architectural Optimizations of Embedded Systems
4. Accelerating Scientific Discovery with SCAIGATE Science Gateway
5. PCS: A Productive Computational Science Platform
6. A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems
7. Machine Learning-based Prediction for Phase-Based Dynamic Architectural Specialization
8. Dynamic Scheduling on Heterogeneous Multicores
9. Realizing Closed-Loop, Online Tuning and Control for Configurable-Cache Embedded Systems: Progress and Challenges
10. Instruction set architecture impact on design space subsetting for configurable systems
11. Overlay-based side-channel countermeasures: A case study on correlated noise generation
12. Comparative analysis of parallel OPIR compression on space processors
13. Hybrid, adaptive, and reconfigurable fault tolerance
14. An Automated Hardware/Software Co-Design Flow for Partially Reconfigurable FPGAs
15. Phase-Based Dynamic Instruction Window Optimization for Embedded Systems
16. Postponing wearout failures in chip multiprocessors using thermal management and thread migration
17. Improving compression ratios for high bit-depth grayscale video formats
18. PhLock: A Cache Energy Saving Technique Using Phase-Based Cache Locking.
19. Microprocessor Optimizations for the Internet of Things: A Survey.
20. Partial Region and Bitstream Cost Models for Hardware Multitasking on Partially Reconfigurable FPGAs
21. An Automated High-Level Design Framework for Partially Reconfigurable FPGAs
22. Memory-aware optimization of FPGA-based space systems
23. Analysis of cache tuner architectural layouts for multicore embedded systems
24. A comparison-free sorting algorithm
25. Configuration prefetching and reuse for preemptive hardware multitasking on partially reconfigurable FPGAs.
26. An Efficient O( $N$ ) Comparison-Free Sorting Algorithm.
27. Minimum Effort Design Space Subsetting for Configurable Caches
28. Dynamic Scheduling for Reduced Energy in Configuration-Subsetted Heterogeneous Multicore Systems
29. Dynamic Phase-Based Optimization of Embedded Systems
30. A framework to analyze processor architectures for next-generation on-board space computing
31. Energy-efficient phase-based cache tuning for multimedia applications in embedded systems
32. Exploiting dynamic phase distance mapping for phase-based tuning of embedded systems
33. An Automated High-Level Design Framework for Partially Reconfigurable FPGAs.
34. Partial Region and Bitstream Cost Models for Hardware Multitasking on Partially Reconfigurable FPGAs.
35. On-chip Context Save and Restore of Hardware Tasks on Partially Reconfigurable FPGAs
36. PRML: A Modeling Language for Rapid Design Exploration of Partially Reconfigurable FPGAs
37. Accuracy-Guided Runtime Adaptive Profiling Optimization of Wireless Sensor Networks
38. MACS: A Highly Customizable Low-Latency Communication Architecture.
39. Parallelized benchmark-driven performance evaluation of SMPs and tiled multi-core architectures for embedded systems
40. A double data rate 8T-cell SRAM architecture for systems-on-chip
41. Dynamic phase-based tuning for embedded systems using phase distance mapping
42. A single-pass cache simulation methodology for two-level unified caches
43. Online algorithms for wireless sensor networks dynamic optimization
44. An application classification guided cache tuning heuristic for multi-core architectures
45. Partially reconfigurable system-on-chips for adaptive fault tolerance
46. Formulation-level design space exploration for partially reconfigurable FPGAs
47. Hardware module reuse and runtime assembly for dynamic management of reconfigurable resources
48. Topology design and performance analysis for networked earth observing small satellites
49. CPACT - The conditional parameter adjustment cache tuner for dual-core architectures
50. A queueing theoretic approach for performance evaluation of low-power multi-core embedded systems
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