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Combating the intersymbol interference is an important issue in single-carrier block transmission systems. In this paper, we present a nonlinear equalizer that combines frequency-domain (FD) prefiltering with time-domain tree search detection. Simulation results show that the proposed algorithm achieves a detection performance that is very close to that of the conventional tree search equalizer (which employs the QRD-M algorithm), but with a much lower complexity. In addition, the proposed algorithm performs significantly better than the linear equalizers and decision-feedback equalizers, with only a modest increase in complexity.

This interleaving energy-conservation mode control for single-inductor dual-output converter uses the superposition technique to yield the optimal average inductor current and 91% peak efficiency. Neither a freewheel stage nor a post-regulator is needed at nominal conditions. The output voltage ripple appears notably minimized over 50% by means of current interleaving at full load. The chip occupies 1.44 mm2 in 65 nm CMOS and integrates with a 3D architecture for ultra-wide band system.

In this paper, a sub-1V input single-inductor dual-output (SIDO) DC-DC converter with an adaptive load-tracking control (ALTC) technique is proposed for single-cell-powered portable devices. The ALTC technique adaptively and accurately adjusts storage charge in form of the inductor current according to actual load condition without wasting surplus charge and increasing cross-regulation through the use of minimized the number of switch and optimum current sequence. A current-mode ring oscillator with a self-bias current source (SBCS) circuit is proposed to replace conventional startup oscillator to produce a nearly constant system clock. The test chip was fabricated by TSMC 0.25 µm 2.5 V/5 V BCD process and experimental results show a high efficiency of 92 % and a cross- regulation smaller than 10 mV.

This 65 nm power management module with 1.2 V low-voltage PWM controller aims to integrate with ultra-wideband (UWB) system to get high efficiency and compact size. The on-chip pre-regulator with power conditioning circuit provides a constant and noiseless supply voltage. Thus, the voltage variation of battery has less effect on the low-voltage PWM controller. The proposed compensation enhancement multistage amplifier (CEMA) increases system loop gain and stabilizes the system without off-chip compensation circuit. With excellent line/load transient response, the proposed power management has the highest efficiency about 92% and 0.995 mm2 silicon die area.

This paper proposes a quadratic differential and integration (QDI) technique for the design of buck converters with small equivalent series resistance (ESR) of the output capacitor. The QDI circuit not only further removes the dependence of ESR in the V2 control but also achieves a fast transient response with small load transient voltage variation. The experimental results show the output voltage can have voltage ripple about 30 mV and recovery time of 20 μs in case of 300 mA load current variation.

In this paper, the compensation of internal resistance of the Li-Ion battery is proposed. The requirement of fast and steady charger becomes the most important issue for power management ICs. Refer to the characteristics of the battery, how to charge the battery with adequate current and fasten the time of charging is critical to the devisers. Due to the impedance of battery pack, the energy of charger charged to cell is consumed in it partly. As a result, the efficiency of charger is reduced inevitably. The previous design has proposed a dynamic circuit for reducing time [1]. However the technique demands the external device to compensate the defeat. Thus, this paper extends the period of the CC mode to charge the battery with a faster speed. Owing to the shifting voltage on the reference voltage, the charger can delay the time that the operation mode from CC mode to CV mode. That is a fast-charging charger can be achieved by a large constant current stored in the battery during a long constant current period. Simulation results verify the success of the fast-charging technique due to the internal resistance compensation.

A trade-off performance between static error and dynamic response is made by the combination of proportional (P) and proportional derivative (PD) compensations. Owing to the fast transient response provided by the P compensator, the static error is also reduced by the PD compensator within a reasonable response time. The proposed control circuit is entirely implemented by voltage mode and has better line and load regulations. An asynchronous 1.8MHz DC/DC boost converter was fabricated by UMC 0.35mum to generate 35V output voltage to turn on more than 10 LED at the same time for the notebook's backlight.

A load dependent proportional-integration (PI) compensation is proposed in this paper for minimizing transient dropout voltage and accelerating the transient response of current mode DC-DC converters. The adaptive compensation resistance and capacitance are used to react to the sudden load variations: At the beginning of load transient response, the adaptive compensation capacitance is decreased to move the compensation pole-zero pair to a higher frequency for achieving fast transient response. At the end of load transient response, the pole-zero pair is moved back to an optimal position for extending the system bandwidth and phase margin based on the instant load condition. Simulation results demonstrate the excellent performance at transient period and steady-state with this proposed fast transient control and adaptive pole-zero compensation. The overshoot/undershoot voltage is smaller than 45mV and transient period is shorter than 15us as load current suddenly changes between 100mA and 500mA.