Search

The unidirectional bipolar resistance switching in GaN/InGaN-based light-emitting diode (LED) was discovered to explore optically readable resistive random access memory (RRAM) device. The device displays stable resistance window in both endurance and retention tests, showing good nonvolatility for memory application. The light-emitting state of this device can also be tuned by the resistance switching. Such phenomenon is illustrated as the switching between conventional light-emitting rectifying behavior and nonlight-emitting metal-like ohmic behavior. Large amount of structural and point defects in the epitaxial wafer were considered as the main contributor to the resistance switching in LED device. [ABSTRACT FROM AUTHOR]

We propose to use a 1-atom-thick structure, i.e., a single graphene sheet for the dynamic control of an Airy plasmon (AiP). The graphene layer serves not only as the guiding medium but also as the modulator for the AiP. By altering the external biased voltage, the effective mode index for surface plasmon waves can be modified. Consequently, the deflection and the propagation distance of the AiP are controlled dynamically. Due to the advantages of graphene plasmons, graphene AiPs may lead to compact and flexible AiP devices. This paper could be also beneficial to relevant applications such as tunable plasmonic optical routing and on-chip signal processing. [ABSTRACT FROM PUBLISHER]

Raman measurement is carried out to understand Vth shift in single-layer graphene field-effect transistors (GFETs). The G (2D) peak shift in Raman spectra is correlated to the corresponding \Delta Vth during stress and recovery phases. A blue (red) shift of G and 2D peaks is seen during stress (recovery) phase, indicating the corresponding trapping (detrapping) effects in the graphene device. It is interesting to note that, after forming gas annealing (\H2/\Ar), the defects can be generated in graphene (evidenced by D peak of Raman spectra), leading to the increased \Delta Vth for both negative bias temperature instability and positive bias temperature instability in single-layer GFETs. [ABSTRACT FROM PUBLISHER]

Different morphologies of ZnO rod arrays with tunable photoluminescence (PL) were synthesized by vapor-phase transport deposition. The morphology and luminescence properties of ZnO rod arrays were found to be dependent on the deposition temperature and can be further tuned by postgrowth annealing treatment. Crystalline ZnO rods with intense UV emission at room temperature (RT) can be synthesized under a relatively lower temperature of 500 °C in a conventional tube furnace. ZnO rods grown at higher or lower temperature regions, however, showed additional defect-related emissions. Besides the commonly observed green emission from vapor-deposited ZnO rods, our samples also showed broad orange-red emission centered at ca. 620 nm. The origin of the different emission bands from the ZnO rod arrays was analyzed based on the annealing treatment in conjunction with the PL characterizations. Furthermore, two prototypes of optoelectronic devices (i.e., LEDs and FETs) were fabricated based on the as-grown ZnO rods. UV electroluminescence was achieved from ZnO rod arrays/p^+-Si heterojunctions at RT, and FET based a single ZnO rod showed comparable transistor properties with previous reports on the ZnO nanorods grown at higher temperatures. [ABSTRACT FROM PUBLISHER]

In this letter, we report positive bias-induced Vth instability in single- and multilayer graphene field effect transistors (GFETs) with back-gate \SiO2 dielectric. The \Delta Vth of GFETs increases as stressing time and voltage increases, and tends to saturate after long stressing time. In the meanwhile, it does not show much dependence on gate length, width, and the number of graphene layers. The \1/f noise measurement indicates no newly generated traps in \SiO2/\graphene interface caused by positive bias stressing. Mobility is seen to degrade with temperature increasing. The degradation is believed to be caused by the trapped electrons in bulk \SiO2 or \SiO2/graphene interface and trap generation in bulk \SiO2. [ABSTRACT FROM AUTHOR]

In this letter, a high-performance unipolar resistive random access memory with Ni electrode/ \HfOx/\AlOy/\p^{+}-Si substrate structure is reported. Compared with \Ni/\HfOx/\p^{+}-Si devices, a significant improvement in terms of switching parameters such as set/reset voltages, on/off resistance ratio, and resistance distribution is successfully demonstrated. It is believed that the stabilization of the conductive filament generation inside the switching \HfOx film due to the \AlOy incorporation plays a key role for the improved performance. [ABSTRACT FROM PUBLISHER]

We report an indium-free transparent resistive switching random access memory device based on \GZO-Ga2\O3\-\break \ZnO-Ga2\O3 \-GZO structure by metal–organic chemical vapor deposition. The memory device shows good transmittance in the visible region and bipolar resistive switching behavior with good cycling characteristics and retention time under room temperature. The conduction and resistive switching mechanism was discussed based on filament theory. [ABSTRACT FROM AUTHOR]

In this letter, a resistive random access memory based on Ni electrode/ \HfOx dielectric/\n^+ Si substrate structure is demonstrated, which can be integrated with Si diode as selector for application in crossbar architecture. The unipolar device shows well-behaved memory performance, such as high on/off resistance ratio ( > \10^3), good retention characteristics ( > \10^5\ \s at \150\ ^\circ\C), satisfactory pulse switching endurance ( > \10^5\ \cycles), and a fast programming speed of about 50 ns. More importantly, it also exhibits almost 100% device yield on a 6-in wafer. [ABSTRACT FROM PUBLISHER]

A correlation between current 1/f noise and dark spot formation is reported. Our results show that the dark spot is primarily correlated to current 1/f noise slope; the higher the slope, the poorer the interface, and the more abnormal dark spot growth rate and the shorter lifetime. Besides, there is a correlation between current 1/f noise magnitude and the dark spot initial size. A higher 1/f noise magnitude generally indicates a larger dark spot initial size. A seemingly identical current-voltage curve does not render the same characteristics of dark spot formation, which can be clearly distinguished from the subtle difference in 1/f noise behavior. The noise measurement can be used to predicate device lifetime and degradation behavior. [ABSTRACT FROM AUTHOR]

A fully CMOS process-compatible differential Tesla-Volt multiplier cell is proposed. It is made of a pair of identical split-drain magnetic field-effect transistors. An absolute and a relative Tesla-Volt multiplying with sensitivities of 2.85 μA/VT and 1.2%/VT, respectively, have been measured. The double-balanced configuration gives a good linearity of the Tesla-Volt multiplying function. [ABSTRACT FROM AUTHOR]