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Composed of computation units each containing a parallel, dual-gate (DG) thin-film transistor (TFT) and a memory capacitor addressed by an access TFT, a neuromorphic circuit implementing fundamental AND and OR logic functions is realized and characterized. The exceptionally low leakage current of a TFT built on indium-gallium-zinc oxide (IGZO) allows the capacitor to be used as a quasi-static memory element. Appropriate weight signals for the realization of the two logic functions are obtained using a gradient-descent training algorithm. The circuit can be configured to execute one of the two functions by the setting of the weight signals. [ABSTRACT FROM AUTHOR]

Spintronic technology is emerging as a direction for the hardware implementation of neurons and synapses of neuromorphic architectures. In particular, a single spintronic device can be used to implement the nonlinear activation function of neurons. Here, we present how to implement spintronic neurons with sigmoidal and rectified linear unit (ReLU)-like activation functions. We then perform a numerical experiment showing the reliability of neural networks made by spintronic neurons, all having different activation functions to emulate device-to-device variations in a possible hardware implementation of the network. Therefore, we consider a “vanilla'' neural network implemented to recognize the categories of the Mixed National Institute of Standards and Technology database, and we show an average accuracy of 98.87% in the test dataset, which is very close to 98.89% as obtained for the ideal case (all neurons have the same sigmoid activation function). Similar results are obtained with neurons having a ReLU-like activation function. [ABSTRACT FROM AUTHOR]

Hardware implementation of artificial neural networks (ANNs) using conventional binary arithmetic units requires large area and energy, due to the massive multiplication and addition operations in the inference process, limiting their use in edge computing and emerging Internet of Things (IoT) systems. Stochastic computing (SC), where the probability of 1s and 0s in a randomly generated bit-stream is used to represent a decimal number, has been devised as an alternative for compact and low-energy arithmetic hardware, due to its ability to implement basic arithmetic operations using far fewer logic gates than binary operations. To realize SC in hardware, however, tunable true random-number generators (TRNGs) are needed, which cannot be efficiently realized using existing complementary metal-oxide-semiconductor complementary metal-oxide-semiconductor (CMOS) technology. In this letter, we address this challenge by using magnetic tunnel junctions (MTJs) as TRNGs, the stochasticity of which can be tuned by an electric current via spin-transfer torque. We demonstrate the implementation of ANNs with SC units, using stochastic bit-streams experimentally generated by a series of 50 nm perpendicular MTJs. The numerical value (1 to 0 ratio) of the bit-streams is tuned by the current through the MTJs via spin-transfer torque with an ultralow current of <5 µA (= 0.25 MA⋅cm-2). The MTJ-based SC-ANN achieves 95% accuracy for handwritten digit recognition on the MNIST database. MRAM-based SC-ANNs provide a promising solution for ultra-low-power machine learning in edge, mobile, and IoT devices. [ABSTRACT FROM AUTHOR]

It has recently been shown that a suitably interconnected network of tunable telegraphic noise generators or “p-bits” can be used to perform even precise arithmetic functions like a 32-bit adder. In this letter, we use simulations based on the stochastic Landau-Lifshitz-Gilbert (sLLG) equation to demonstrate that similar impressive functions can be performed using unstable nanomagnets with energy barriers as low as a fraction of a kT. This is surprising because the magnetization of low-barrier nanomagnets is not telegraphic with discrete values of ±1. Rather, it fluctuates randomly among all values between -1 and +1, and the output magnets are read with a thresholding device that translates all positive values to one and all negative values to zero. We present sLLG-based simulations demonstrating the operation of a 32-bit adder, with a network of several hundred nanomagnets, exhibiting a remarkably precise correlation: The input magnets A and B as well as the output magnets S all fluctuate randomly and yet the quantity A + B-S is sharply peaked around zero! If we fix A and B, the sum magnets S rapidly converge to a unique state with S = A + B so that the system acts as an adder. But unlike standard adders, the operation is invertible. If we fix S and B, the remaining magnets A converge to the difference A = S - B. These examples emphasize a new direction for the field of nanomagnetics away from stable high-barrier magnets toward stochastic low-barrier magnets that not only operate with lower currents, but are also more promising for continued downscaling. [ABSTRACT FROM PUBLISHER]