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This paper proposed a two layered 2 × 1 Koch Curve patch array antenna design with suspended air gap technique for Wireless Local Area Network (WLAN) application of 2.4 GHz resonant frequency. This proposed patch antenna is using two FR-4 substrate layers with dielectric constant, e r = 4.4 and the electrical conductivity tangent loss, tanΔ = 0.019. It is using the suspended air gap technique between two layers for enhancement effect of antenna gain from 4.89 dB to 5.18 dB. At the upper part of substrate, it consists a two feeding networks that connected the two patch of Koch Curve array patch. Beside antenna gain, this technique also improves the bandwidth and return loss of the antenna. It also contains a Koch Curve array structure at the patch part and have a full ground of copper at the back. This Koch Curve is design based on the basic equilateral triangle with three iteration steps. For the first iteration step, it be made up of the equilateral triangular shaped while the second iteration are added with mirror design of equilateral triangular to create a six segment of star-shaped. For the third iteration step, the equilateral triangle with the length base on previous iteration step is constructed on top of the side line of the base triangle. This third iteration step of the Koch Curve effect the reduction size of the patch antenna from 100 mm × 100mm to only 90mm × 60 mm. The return loss performance at resonant frequency 2.4 GHz is −32.735 dB.

Ge n- and p-FinFETs with different interfacial layer ferroelectric HfZrO x (IL-FE-HZO) gate stacks have been demonstrated systematically by various annealing conditions for the first time. Microwave annealing (MWA) not only shows enhanced FE characteristics but also suppresses the gate leakage and Ge interdiffusion compared with conventional rapid thermal annealing (RTA). While HZO on Al 2 O 3 IL results in paraelectric behavior, HZO on GeO x IL exhibits significant FE. High I on /I off (> 107) and low subthreshold slope (S.S. ∼ 58 mV/dec.) are demonstrated by a Ge nFinFET with a gate length (L g ) of 60 nm and a FE-HZO/GeO x gate stack.

For the first time, Ge CMOS with all thermal processes performed by microwave annealing (MWA) has been realized. The full MWA process is under 390 oC. It significantly outperforms conventional rapid thermal annealing (RTA) process in 3 aspects: (1) Diffusion-less junction: for easily diffused n-type dopant, phosphorous (P), the ion implantation dopant profile after the MWA activation process remains unchanged. (2) Increased C ox and lower gate leakage: the low temperature activation process leads to less Ge out-diffusion during MWA than RTA, suppressing the degradation of gate dielectric/ Ge channel interface. (3) Ultrathin 7.5nm Ni mono-germanide with low sheet resistance (Rs) and contact resistivity: after two-step MWA, a thin mono-NiGe layer was obtained which has larger crystallite size to lower Rs. Ge n- and p-MOSFET were also demonstrated. Compared to conventional RTA, the MWA gives 50% and 24% drive current enhancement for p- and n-MOSFET, respectively. These data show that the low temperature MWA is a very promising thermal process technology for Ge CMOS manufacturing.