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This paper describes a sound source localization (SSL) approach based on Deep Convolutional Neural Network (CNN). Conventional SSL methods, either based on the time delay of arrival (TDOA) or Subspace such as Multiple Signal Classification (MUSIC), often fail in scenarios where real-time localization is required. To resolve this limitation, in recent years, researchers have been using feature-based neural networks to locate sounds. However, this type of network is not ideal and suffers from the same limitation as feature extraction must be done prior. In this paper, we propose a non-feature based learning approach to bypass the need for feature extraction through the use of convolutional layers to directly learn the features responsible for the non-linear mapping between the raw signals from each microphone in the microphone array to their respective directions and locations. Advantages of this method over conventional feature-based learning approaches are that the computational cost is reduced, and it no longer suffers from low accuracy arises from the features derived from traditional methods. Primarily experimental results have shown promising accuracy on locating sound source as compared to conventional methods and feature-based neural networks.

This paper investigates the UAV mission planning problem in which one needs to find the optimal plan/schedule to carry out various tasks of different time windows at various locations using a fleet of fixed-winged heterogeneous UAVs. For this realistic and complex UAV mission planning problem, a two-step approach is proposed to solve it: flying path planning and task scheduling. The solution method includes a graph-based search algorithm to solve path planning problem and a MILP-based algorithm to solve task scheduling problem. To test the effectiveness and efficiency of the developed algorithms, experiments were designed and carried out. It shows that the developed algorithms can solve the defined UAV mission planning problem effectively.

In this paper, the problem of mission planning with UAVs for urban surveillance is studied. The target is to guide a group of UAVs equipped with cameras to fly over an urban area (possibly hostile) to provide complete surveillance coverage in an optimal manner. The camera, mounted on gimbals fixed to the UAVs, has the capability of panning and tilting. Thus, not only the trajectory of the UAVs, but also the schedule for orienting the camera axis needs to be provided in the mission plan. The problem is solved with a two-stage approach. In the first stage, a set of candidate camera configurations (location + camera axis) are identified. The sum of coverage of these camera configurations forms a super set for covering the target area. In the second stage, the optimal set of camera configurations, called the vantage set, is constructed from the super set. On one hand, the vantage set ensures complete coverage. On the other, it also leads to lowest flying cost with the available UAVs. Evolutionary algorithms (PSO and GA respectively) have been developed for optimization in both stages. Different fitness functions have been established to deal with situations with/without enemy presence.

A prognostic circuit for electromigration failure of integrated circuit was proposed, and it was simulated on the base of the SMIC 0.18 um mixed-signal CMOS process model. The prognostic circuit is composed of stress and detection module, two-stage comparator, offset voltage cancellation module, non-overlapping clock generation module, and output module. When the increase amount of resistance for interconnect line exceeds a preset value due to electromigration, the output of the prognostic circuit designed to fail faster will jump from low voltage to high voltage. It indicates the impending failure of hosted circuit because of that the prognostic circuit experiences the same manufacturing process and operational environment as the hosted circuit. The research results are useful for the prediction of performance degradation and failure of integrated circuit.

Through silicon via (TSV) is a three-dimensional packaging technology involving vertical chips stacking using metal-filled via holes and bumps. TSV stacked chip drastically reduces interconnect distance than conventional multi-stack wire bond silicon chips, enabling faster speeds, lower power consumption and smaller microelectronic package size for 22nm tech node and below. TSI (Thru Silicon Interposer) enables interconnect pitch matching between a high I/Os top chip and low cost organic substrate and is crucial in mitigating risks of low K layer delamination and provide additional routing capability to enable the use of low cost organic substrate. This paper demonstrate with aid from finite element analysis, the daunting processibility challenges and reliability performance for a 2 die and 4 die thin die stacking on a strip organic substrate using standard flip chip machines in a mass production scenario. Critical factors such as 1× versus 2× reflow process flow, material properties fundamentals, bill of material (BOM), substrate & package structure design and its influence on thermo-mechanical stress, package warpage and joint cracks in conjunction with process breakthrough to enable multiple die stacking, multi-gap flux cleaning and capillary underfilling will be discussed in great details. In addition, Micro C4 solder bumps joints with TiW/Cu/Ni under bumps metallization (UBM) and TiW/Cu/Ni/Au bond pad were shown to be reliable with integrity of the UBM with regards to IMC growth and solder diffusion up to 1000 thermal cycles. Establishment of all these fundamental capabilities is required to strengthen the low cost high volume production capability for thru silicon stacking (TSS).

High performance, multi functional and package miniaturization will be the main driving forces that propel the future trend and development of fully integrated multi silicon dies stack using through silicon via (TSV) packaging technology. This paper serves as an extension of the foregoing paper, where TSV-micro C4 solder interconnect were used and stack up to 4-die compared to the 2-die stack previously demonstrated at ECTC 2010[3]. This study is driven by future requirement for memory dies stacking or multiple devices stacking on a thru silicon interposer (TSI). A TSI enables interconnect pitch matching between a high I/Os top chip and a low cost organic substrate however, extension to 4 die stack reveals many daunting assembly challenges for all backend assembly processes. This paper demonstrates with assistance from finite element analysis, actual process verification and reliability test, the required fundamental changes to material properties, bill of material (BOM) and assembly process manufacturability modification in order to achieve feasible assembly process and reliable performance for 4 thin die stacking to an organic substrate using a 1× solder re-flow process and standard flip chip machine in a mass production scenario. This achievement will further strengthen low cost high volume production capability for thru silicon stacking (TSS).

This paper presents a method for optimal multiple cutter selection and tool-path generation in 5-axis sculptured surface finish cut. Compared to machining using a single cutter, the application of multiple cutters can shorten the cutting time significantly. In our early work, a method has been developed to select the largest feasible cutter to finish the whole of a given sculptured surface by addressing gouging and collision problems. In this paper, this method is extended to select an optimal set of cutters to finish different regions of a given sculptured surface with the maximum cutting efficiency. The iso-planar tool-paths for finishing the different regions using their specified cutters are then generated using a developed optimization algorithm to maximize the step-over between adjacent tool-paths. An example is presented to show the validity and effectiveness of the developed methods.

A good concurrency control method that maximizes the operational parallelism while prevents conflicts of simultaneous manipulations is vital for cooperative design systems and still a challenge. We propose an adaptive granular concurrency control approach for the replicated collaborative feature modeling based on the feature dependency directed acyclic graph (FDAG). According to the varying design contexts, an adaptive granularity for concurrent manipulations is determined dynamically by the FDAG of the replicated model to avoid concurrent regeneration conflicts. A prototype is realized on a real-time collaborative design system consisting of heterogeneous CAD systems. The preliminary results show that the approach proposed is promising.

This paper presents an automated method of optimal cutter selection for finish milling of sculptured surfaces on a 5-axis machine. The objective is to maximize the machining efficiency with the largest feasible cutter (ball-nose, filleted, or end-mill) available while ensuring that at least one attitude of the cutter can be found at every point of the surface that does not cause gauging. A discrete point-based approach is employed to check whether a given cutter is feasible for finishing the entire surface. To reduce the calculation time, the whole surface is firstly partitioned into several regions with different machining features based on the local surface geometry. Only critical regions are subject to the analysis of gouge avoidance. Based on the comparison between the local part surface and cutter surface shapes, an exact geometry analysis method is developed to avoid local gouge problem along every possible feeding direction. An example is given to show the efficacy of the developed method.