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Your search keyword '"Yang, Jingwen"' showing total 27 results
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27 results on '"Yang, Jingwen"'

14. Research on Allocation and Dispatching Strategies of Rescue Vehicles in Emergency Situation on the Freeway

Author

Yang Jingwen, Jun Wang, Yinli Jin, and Ping Wang

Subjects
Transport engineering, 0209 industrial biotechnology, Accident (fallacy), 020901 industrial engineering & automation, Traffic accident, Computer science, 0202 electrical engineering, electronic engineering, information engineering, Law enforcement, 020201 artificial intelligence & image processing, Resource management, 02 engineering and technology, Rescue vehicle
Abstract

Allocation and dispatching strategies of rescue vehicles in emergency situation on the freeway are investigated in this paper. Three steps are proposed for rescue vehicles to arrive traffic accident point as fast as possible. Firstly, traffic accident level are cataloged based on severity of accident and other influencing factors. Then, which types and how many rescue vehicles are required for the specific traffic accident according to corresponding accident level. Finally, three dispatching methods are proposed and verified in a case study. This paper selected a traffic accident randomly happened on Hanning Freeway in Shaanxi Province as a case study. The result shows the application of the three methods in case study and contains optimal rescue vehicle dispatching method. This paper provides suggestions for emergency handling of traffic accidents on the freeway and gives an intelligent way to improve the management of the freeway.

Published
2020

15. Analytical Model of CFET Parasitic Capacitance for Advanced Technology Nodes.

Author

Sun, Binqi, Xu, Zhongshan, Ding, Rongzheng, Yang, Jingwen, Chen, Kun, Xu, Saisheng, Xu, Min, Lu, Ye, Zhu, Xiaona, Yu, Shaofeng, and Zhang, David

Subjects
HIGH technology, FIELD-effect transistors, LOGIC circuits, COMPUTER simulation, TRANSISTORS
Abstract

The complementary field-effect transistor (CFET) with stacked N-type FET (NFET) and P-type FET (PFET) is an attractive approach to shrink the footprint of multiple devices at circuit level and increase transistor density. Compared with traditional device structure, the unique geometry of CFET brings very different parasitics. In this work, we take the inverter as an exemplar CFET circuit building block and provide analytical compact models of calculating parasitic capacitance, which is critical to enable fast and accurate simulations at circuit level. The validity of the models is calibrated and verified with 3-D numerical simulations. A comparison between the CFET inverter with its same ground-rule gate-all-around FET (GAAFET) counterpart reveals the critical CFET design parameters and demonstrates performance advantage of CFET architecture. [ABSTRACT FROM AUTHOR]

Published
2022
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16. Novel Postgate Single Diffusion Break Integration in Gate-All-Around Nanosheet Transistors to Achieve Remarkable Channel Stress for N/P Current Matching.

Author

Liu, Tao, Wang, Dawei, Pan, Zhecheng, Chen, Kun, Yang, Jingwen, Wu, Chunlei, Xu, Saisheng, Wang, Chen, Xu, Min, and Zhang, David Wei

Subjects
FIELD-effect transistors, FREE surfaces, TRANSISTORS, STRESS relaxation (Mechanics), EPITAXY, SURFACE preparation, LOGIC circuits
Abstract

A novel integration scheme of postgate single diffusion break (PG-SDB) has been proposed to enhance channel stress for Si gate-all-around (GAA) nanosheet field-effect transistors (NS-FET), based on TCAD simulations. Compared to conventional SDB and self-aligned SDB (SA-SDB), the proposed PG-SDB scheme implements SDB module after the replacement metal gate (RMG) process, so as to eliminate the stress relaxation to free surfaces. The channel stress has been boosted to +3.5 GPa/−4.7 GPa, for N/P NS-FETs, respectively. As a result, great drive capability as well as N/P current matching has been achieved in the PG-SDB GAA NS-FETs. [ABSTRACT FROM AUTHOR]

Published
2022
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