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A radiation resistant standard cell library is completed based on SMIC 0.18 μm technology in this paper. Standard cell library includes combinatorial logic cells and sequential logic cells. SET (Single Event Transient) effect always occurs in combinatorial logic cells, and SEU (Single Event Upset) effect always occurs in sequential logic cells. SEL(Single Event Latchup) and TID(Total Ionizing Dose) effects affect all logic cells. According to radiation effects, logic cells in the standard cell library are designed with harden methods at the circuit level and the layout level. Combination logic cells adopt fault-tolerant delay filtering method in circuit level, and sequential logic cells use DICE structure in circuit design. A guard ring has been added to the layout design for the SEL and TID effects. Then physical information and timing information are extracted for all cells, and the library building process is completed. Finally we use EDA tools to verify the availability of the anti-radiation library.

This paper presents a 2-point algorithm for relative pose estimation of a monocular camera mounted on a ground vehicle. Specifically, the geometric model is developed by combining two-view geometry with planar motion constraint. Based on the proposed model, the relative camera pose information can be estimated efficiently with at least 2 feature correspondences. Besides, the proposed algorithm can recover rotation independently with translation so that pure rotation can be computed stably under planar motion. Both experiments on synthetic data and in real world are presented. In the synthetic data experiments, the proposed algorithm is compared with other well-known algorithms to illustrate its high accuracy and robustness to image noise. In addition, the great robustness of the proposed algorithm to nonplanar motion is demonstrated as well. Furthermore, experiment are carried out based on KITTI Vision Benchmark, and the result indicates that the proposed algorithm has better performance than 5-point algorithm for monocular visual odometry and has a wide range of applicability.

In this paper, an observer-based approach is proposed to asymptotically identify the velocity and range of feature points on a moving object using a static-moving camera system. Specifically, the system is composed of a static camera and a moving camera, and the approach is divided into two steps. Firstly, utilizing the static camera, a nonlinear observer is designed to identify the up-to-a-scale velocity of feature points. Secondly, with the moving camera and the estimated scaled velocity, the range of feature points is identified by an adaptive estimator. Owing to the introduction of the static-moving camera system, no motion constraint or a priori geometric knowledge is required for the moving object. Lyapunov-based analyses are used to prove that the estimators asymptotically identify the velocity and range of feature points. The performance of the proposed strategy is demonstrated by simulation results.

Manufacturers are continuously pushing NAND flash memory into smaller geometries and enforce each cell to store multiple bits in order to largely reduce its cost. Unfortunately, these scaling down techniques inherently degrade the endurance and reliability of flash memory. As a result, permanent errors such as block or die failures could occur with a higher possibility. While most transient errors like programming errors can be fixed by an ECC (error correction code) scheme, rectifying permanent errors requires a data redundancy mechanism like RAID (redundant array of independent disks) in a single SSD where multiple channels work in parallel. To enhance the reliability of a solid-state drive (SSD) while maintaining its performance, we first implement several common RAID structures in the channel level of a single SSD to understand their impact on an SSD's performance. Next, we propose a new data redundancy architecture called CR5M (Channel-RAID5 with Mirroring), which can be applied to one SSD for mission-critical applications. CR5M utilizes hidden mirror chips to accelerate the performance of small writes. Finally, we conduct extensive simulations using real-world traces and synthetic benchmarks on a validated simulator to evaluate CR5M. Experimental results demonstrate that compared with CR5 (Channel-RAID5) CR5M decreases mean response time by up to 25.8%. Besides, it reduces the average writes per channel by up to 23.6%.

Data-intensive applications like video processing and bioinformatics increasingly demand a high-performance and highly reliable storage system. Hard disk drive (HDD) has long been used as a standard storage device for most existing storage systems. Recently, NAND-flash memory based solid state drives (SSDs) are gradually exploited to replace HDDs in enterprise computing infrastructures due to their salient features such as high performance, low power consumption, and excellent shock-resistance. With rapid price decreasing and capacity increasing, flash SSD based disk arrays organized in some RAID structures become feasible and greatly needed. In this paper, we propose a new RAID4 architecture called SPD-RAID4 (Splitting Parity Disk - RAID4) for parallel SSD arrays. It splits the parity disk of a traditional RAID 4 array into configurable number of smaller ones. Thus, multiple small parity SSDs operate in tandem with data SSDs to achieve a high performance and high level of reliability. We compare the performance of SPD-RAID4 with conventional RAID4 and RAID5 architectures by using both real-world traces and synthetic benchmarks. Experimental results demonstrate that in terms of mean response time SPD-RAID4 outperforms standard RAID5 structured SSD arrays by up to 20.3%. Compared with standard RAID4, SPD-RAID4 achieves a performance gain up to 40.6%.

Color and texture information are two important visual features of an image. In this paper, an efficient content-based image retrieval system is proposed based on color and texture feature. The color feature is extracted by quantifying the HSV color space into non-equal intervals and the color feature is represented by color histogram. Texture feature is obtained by local binary pattern (LBP). When computing the similarity between query image and target images in the database, Gaussian normalization is exploited on the feature space and distant space. And then the linear combination of normalized distances for color and texture is performed to obtain the similarity as the index of image. The exhaustive search scheme is used for retrieval, and the evaluation criterion is precision and recall about the number of returned images. The results of experiments demonstrate the efficiency of the proposed system.

Commodity operating systems execute device drivers in the kernel to achieve good performance. Unfortunately, this scheme is a significant cause of system failures. A study at Stanford University found Linux drivers have 3 to 7 times bug frequency as the rest of the operating systems. User-mode driver has long been considered as a good solution to solve this problem, but it suffers from either poor performance or bad compatibility because of context switch between kernel-space and user-space as well as modifying the code of commodity operating systems or existing traditional drivers. This paper proposes a new architecture U2MDF-Unified User-Mode Driver Framework. U2MDF splits the traditional device driver into two parts: kernel-driver module and user-driver component. In experiment SystemTap and Netperf are used to evaluate U2MDF and experimental data shows U2MDF not only obtains good performance and compatibility but also provides a unified framework for user-mode device drivers' development.

With the development of multicore systems, multicore real time scheduling is becoming a hot topic in time-critical systems. Cache warm-up overheads introduced by task migration between two cores can result in missed deadlines for tight realtime schedules. In this paper, we present an exact method for multicore schedule ability analysis under cache warm-up overheads. The result of the analysis is used to determine whether it's necessary to change the scheduling algorithm or the hardware architecture. Correct and schedulable properties of the model are formalized and verified. It is shown that our approach is less pessimistic than bound tests.

In this paper, we present a novel scheme to tackle the task of near-duplicate image detection. Given two input images, the algorithm based on the refined similarity measure can judge rightly whether two input image are duplicate images or not. The two images are represented with local feature (i.e, Affine-SIFT) in bag of features model. The Affine-SIFT can undergo larger affine distortions than Hessian-Affine and MSER (Maximally Stable Extremal Region). The refined similarity measure exploits the spatial information between two images. The algorithm is demonstrated on some image pairs with scale change, viewpoint change, blur, noise and spatial deformation. The experimental results show that proposed algorithm is more effective than other state-of-the-art duplicate image detection algorithm.

Verification is one of the most complex and expensive tasks in current Application Specific Instruction-set Processor (ASIP) design process. Many existing approaches utilize a multi-level strategy to efficiently design and verify ASIP aiming to discover the flaws earlier. This paper presents a verification approach based on HDPN (Hardware Design based-on Petri Net) and NuSMV. The validation of static properties, viz. structural and functional description of ASIP architecture, implements with HDPN, and the verification of dynamic properties, viz. logic design, implements with NuSMV. In order to check the dynamic properties of HDPN-based models, a scheme of translating from a HDPN description into SMV is discussed in this paper. In addition, a DLX pipelined processor is presented to demonstrate the verification approach.

With the development and application of pipeline technique in processor, the verification of pipeline designs is becoming important in academies and industries. This paper presents a method to model and check the correctness of pipeline with bypass configuration at instruction level. This method is based on model checking, a method of formal verification. This method not only suits for the complete bypass design, but also can be used to check the validation of partial bypass configuration. The properties a bypassed design should satisfy are also provided. And the abstracted model can be verified automatically by using NuSMV, which is a tool used for model checking. If the properties cannot be satisfied, a counterexample is created to help correct the design or the model.

Many Intelligent Transportation System applications require continuous and accurate positioning information of the vehicles traveling on the road network. The common devices used for vehicle location are based on Global Position System (GPS), dead-reckoning (DR) sensors, map matching (MM). The paper develops a fuzzy logic based map matching algorithm. The algorithm is tested on different road networks of varying complexity. The results show that the fuzzy logic based map matching algorithm provides a significant improvement over existing map matching algorithms both in terms of identifying correct links and estimating the vehicle position on the links.

In a wide variety of imaging applications (especially medical imaging), the theory of compressed sensing has shown it is surprisingly possible to reconstruct the entire original image from a partial set or subset of the Fourier transform of an image, if the image has a sparse or nearly sparse representation in some transform domain. Recently many fast and efficient algorithms have been proposed by solving a convex lscr1-minimization problem, which is often used as a scheme of the image recovery. In our work, we will introduce other methods in which the lscr1 norm is replaced by the lscrp norm for p isin (0,1) and the log-sum penalty function, and then perform numerical experiments to compare their performance.

In the paper, an algorithm is put forward based on fuzzy logic for real-time matching of GPS positioning results, which is integrated with DR in intelligent transportation system. Besides, at junctions this algorithm makes use of road network topological structure and the continuity of vehicles' track to choose the continuing route with maximum possibility as a matched result from multiple candidates. The algorithm can be widely used as its computation is easy and the matching result is more accurate.