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Convolutional neural network has been extensively used in image classification, video processing and semantic recognition. Generally speaking, convolutional neural network is accelerated by high power GPU, but this work uses the FPGA to speed up the convolutional neural network because of its configurability and low power consumption advantage over GPU. Especially, OpenCL-based high-level synthesis tools can provide fast verification and implementation flows. This work mainly uses the Winograd’s minimal filtering algorithm to accelerate VGG-16 network on Intel Arria 10 GX FPGA board and has a good effect on 3x3 convolution kernel. The peak performance of 227 GOP/S has been achieved with 544 DSP.

In some cases, only two current sensors are available in three-phase three-wire (3P3W) inverters. This occurs when one of three sensors is faulty, or the inverter is equipped with only two sensors to save cost. There has been no method addressing the diagnosis of both IGBT open-circuit faults and current sensor faults in the 3P3W inverter with only two current sensors. In order to solve this problem, a nonintrusive method based on average output voltage deviations is proposed. The deviations between the measured and estimated output line and phase voltages are utilized to detect and locate the fault. With average model, this method can diagnose the fault fast with only signals available in the controller. Therefore, no extra sampling or diagnosing circuits are needed. Besides, the error-adaptive thresholds are adopted to ensure the robustness. Finally, experimental results verified the effectiveness.

This paper aims at improving transient performance of LCL-filter-based grid-connected inverters with active damping. Transient performance of inverters controlled by capacitor current feedback active damping (C2FAD) is analyzed, revealing that grid-currents of the inverters may have overshoot and long settling time when loads fluctuate. To improve transient response better than C2FAD do, a dual current feedback active damping (DCFAD) is proposed. The proposed DCFAD could realize virtual resistor connected in parallel with capacitor and virtual resistor connected in series with grid-side inductor, consequently, adding a control parameter to the algorithm to configure the poles effectively without adding sensors. Experimental results based on a single-phase grid-connected inverter prototype with LCL filter are presented to demonstrate that DCFAD could eliminate overshoot and reduce settling time, when comparing with C2FAD.

Dynamic currents and voltages in power electronic converters often exceed rating when changing load. In this way, this paper researches on optimizing transient performance of LCL-type gird-connected inverter systems. Resistor connected in series with capacitor as passive damping (RCSCPD), which is widely used to damp resonance of LCL filter, needs to choose an appropriate resistor to acquire accurate and fast transient performance. To meet this requirement, an approach is proposed for analyzing and improving transient performance. It shows that passive resistor could damp resonance and stable system. Limitation of RCSCPD, which could not optimize dominant transient response, is exhibited as well. Hence, mix damping (MD) is proposed to achieve the goal. It could eliminate overshoot and decrease settling time efficiently when comparing with RCSCPD. MD could configure the poles effectively without adding precision sensors because it uses grid current, which used in control loop, to realize active damping resistor. Experimental results based on single-phase LCL-type gird-connected inverter prototype are given to show optimizing effects of transient performance.

Modular multilevel converter (MMC) is one of the most potential converter structures for medium/high power/voltage applications. Since the electrical energy is stored in the capacitances of its sub-modules during the operation of the MMC, the output power quality is directly related to the capacitor voltage. Therefore, capacitor voltage balance is of great importance. In this paper, a capacitor voltage balancing strategy for the carrier phase-shifted modulation strategy is presented for MMC by rotating the carriers, which not only solves the problem of capacitor voltage balance, but also avoids complex closed-loop modulation and voltage sequencing. Considering the potential additional switching process during carrier rotation, the algorithm is further improved to find the best rotation period. The experiment verifies the propositions.

This paper proposes a fast multiple semiconductor open-circuit fault diagnosis method for a T-type three-level inverter. In this method, appropriate Boolean operations are selected to represent the relationship between voltages across the upper half-bridge switches and switching signals. Based on this, the current path in the circuit can be tracked under normal and abnormal conditions. Logical relationships are linked to corresponding switch states, so this method is applicable even under multiple open circuit faults. Diagnosis results can be obtained rapidly, with simple hardware. Misdiagnosis caused by delays in power devices and sampling circuits can be avoided if switching signal dead time is longer than the total delay. This diagnostic scheme is immune to load disturbances and dead times. Experimental results obtained under various conditions demonstrate the applicability and performance of the approach.

This paper designs an LLC converter with super-wide output voltage. A variable-mode control strategy with three operating modes is adopted for the converter, and a novel optimal parameters design method based on this strategy is proposed. The designed converter can achieve a super-wide output voltage range at various load without increasing circuit’s complexity, expanding the operating frequency and phase-shifted range. The magnetizing inductance is maximized to decrease magnetizing and conduction losses on condition that the requirements of wide gain and primary MOSFETs’ soft-switching are met, so the converter can maintain a high efficiency within the entire output voltage range. Finally, a 2.5kW experimental prototype with output voltage ranging from 25V to 150V is set up, by which the effectiveness of the strategy and the design method are proved.

Modular multilevel converters (MMC) can be used in many applications such as medium voltage multimegawatt drives and HVDC power transmission. Modulation strategy plays an important role for the good performance of MMC. In this paper, a submodule (SM) regrouping method of MMC is presented and based on this, a sampling time staggered space vector pulse width modulation (STS-SVM) technique is proposed for MMC. Each group has three SMs, which is irrespectively from three phases. Thus, the SVM scheme for the two-level converter can be applied in each group. For an MMC with n-SMs per arm, the two-level SVM for each group is staggered evenly over the sampling time, so as to achieve an equivalent switching frequency at the output. Therefore, the STS-SVM can be very easily expanded with the increasing of the SMs number, and also, the off-line or on-line effort/tasks about generating the SVM switching sequences are simplified significantly. Besides, the capacitor voltages of SMs can be balanced by rotating the gate signals of different SMs even without any capacitor voltage detecting or sorting because the even power distribution among SMs is realized. A three-phase MMC is simulated at both steady and dynamic states in MATLAB/Simulink and validate the performance of the proposition.

Inductive power transfer (IPT) system for electric vehicle battery charging has many advantages over the traditional plug-in system. EV battery can be regarded as a wide range load according to the charging profile. The charging process requires constant current (CC) stage and constant voltage (CV) stage. The charging profile for IPT system is influenced by inductively coupled transformer, compensation structure and operating frequency. This paper proposes an IPT topology which naturally obtains CC and CV output functions simultaneously without increasing the complexity of control system. The system switches between the two charging modes in succession along with the change of load condition. It operates under the CC mode when the load resistance is small, which corresponds to the beginning of battery charging state. With the increase of load resistance, it switches to CV mode at a load turning point after which the battery is under the state of cutoff voltage. As the system is completely compensated, zero phase angle input is achieved during the entire charging process, which realizes soft switching for the entire load range. A fixed frequency control method is used to adjust the output accurately. The experimental IPT system is established to verify the theoretical analysis.

This paper presents an average model-based transistor open-circuit fault diagnosis method for grid-tied single-phase inverters which transfer power bi-directionally. It is easy to detect whereas tricky to identify the faulty transistor, for two different faults may show the same characteristics. In order to solve this problem, the inverter is changed to boost mode after fault is detected, so that the diagnosis variable can show distinguishable characteristics to locate the faulty transistor. The main advantage of this method is that the fault can be diagnosed fast without adding extra circuits. Additionally, it is featured with strong robustness against power change and sampling error. Finally, the effectiveness of the proposed method is verified by experiments.

This paper presents an average model-based diagnosis method for current sensor fault and IGBT open-circuit fault in grid-tied three-phase voltage-source inverters (VSIs). The diagnosis algorithm is based on observed inductor current sum deviation and bridge arm line voltage residuals with adaptive thresholds. The proposed method can guarantee fast diagnosis speed as well as strong robustness for both current sensor faults and IGBT faults, without extra hardware circuits. The fault diagnosis speed can be as fast as one switching period. No tuning effort is needed under different operating conditions since all the diagnosis calculation errors are covered in the thresholds. Finally, experiments are carried out to prove the effectiveness.

A novel fast open-transistor diagnosis approach for voltage-source inverters (VSI) based on calculated bridge arm pole-to-pole (PTP) voltages is proposed in this paper. The theoretical PTP voltages can be calculated with duty cycle ratio and DC input, and the real PTP voltages can be calculated with output voltages and currents. When no fault occurs, there should be no difference between the theoretical and the real PTP voltages. Once fault happens, great deviations between these two calculated voltages will be incurred and can be utilized to detect and localize the fault. This method is able to achieve fast diagnosing speed, while no extra hardware circuits and complex calculation are needed, thus it can be embedded in the existing control system with little effort. Furthermore, strong robustness against operation variation makes this method feasible in diversified applications. Simulations and experiments have been carried out to validate the correctness and effectiveness of this method.

In this paper, a zero-current switching (ZCS) current source converter (CSC) topology is proposed by adding an auxiliary circuit between the dc side. During each commutating process, the auxiliary circuit is activated, so that the outgoing switches can be turned off with zero current switching. As a result, all active switches can reach ZCS operations. This feature makes it possible to increase the switching frequency to improve the line current quality where a small size of ac filter is required. That means the presented ZCS CSC topology is very suitable for some applications with high PWM frequency. Simulation gives the verification.

A current soft-commutation Space Vector Modulation (SVM) scheme for three-phase current source converter (CSC) is proposed in this paper. With the presented SVM, the incoming switch has a positive collector-to-emitter voltage while the outgoing switch has a negative collector-to-emitter voltage during current commutations. That is, natural soft-commutations for switching transitions are achieved with accelerated current-commutating processes and lessened durations. As a result, distortion of the line currents can be reduced. Besides, due to the lessened overlapping time, the switching frequency is expected to reach as high as possible to reduce the ac filter and improve the line current quality. Especially, since the presented SVM is based on a closed-loop strategy, soft commutations can be reached in CSC with any power factor operation. The experiment verifies the proposition.

Three-phase inverter has been widely applied in various applications, and lots of control schemes are investigated for the inverter powering nonlinear load, aiming to achieve favorable performance. However, the model currently proposed for inverter is based on linear load, which is not suitable for condition with nonlinear load. In this paper, a novel modeling method for three-phase inverter powering nonlinear load is proposed. Then, the mathematical derivation and performance analysis of the proposed model are presented in detail. Based on the proposed model, a control scheme is further presented, incorporating PI control and capacitor current feedback. In addtion, the second-order system damping theory and phase-plane analysis method are well developed to describe the steady-state and dynamic performance of the proposed model and control scheme. Compared with conventional dual-loop control, low THD of the ouput voltage could be acheived by means of the proposed scheme, which is perfectly validated by the simulation results.

In this paper, a novel hysteresis loss calculation approach named the double-envelope method is proposed. The method can clearly separate the low-frequency loss and the high-frequency loss. By recording the points where the inductor current reaches minimum or maximum in every switching period, the envelopes of magnetic field H and flux density B in the time domain are acquired, and then the double envelopes on the B-H plane can be obtained. A dynamic minor loop of amorphous core is modeled to calculate the high-frequency loss. With this method hysteresis loss of the AC filter inductor in PWM inverters can be calculated accurately and rapidly. Moreover only the width of the minor loop is needed to measure in experiments, while other parameters can be acquired at the design stage. In order to verify the proposed method, the total loss of an AC filter inductor in a three-level NPC inverter is measured in different switching frequencies and load conditions. The changing trends of the low-frequency loss and the high-frequency loss with currents and switching frequencies are discussed.

LCL filter presents a significant attenuation of switching harmonics, however its resonance peak influences the system stability. Passive damping reduces the switching current harmonics attenuation and increases the extra losses. Nevertheless, traditional active damping method often needs additional sensors or increases the complexity of algorithm. According the Nyquist stability criterion, a novel active damping method is proposed in this paper based on the grid current feedback compensation which adds no more sensors and easy to control. Two kinds of current compensation transfer function are presented. Moreover, the design principles and the range of stable system with active damping are derived step by step. Finally, it compares the damping effect of the different compensation methods through experiment and verifies the theoretical analysis at the same time.

An improved switching loss calculation method for IGBT switching on, switching off and the diode reverse recovery energy losses in neutral point clamped inverter is proposed in this paper. A model of linear instantaneous switching on and off waveforms is presented to approximate actual switching process. The IGBT switching on and off duration, the changing rates of current di/dt and collector-emitter voltage dv/dt all can be calculated at different load currents with the given IGBT parameters. Besides, the proposed method is apparently different from the linear waveform method used before which assuming switching time to be a constant value. In addition, compared with the traditional mathematical equation that uses measured data to fit a formula, the equation proposed here is based on physical model and it can indicate the relationship between gate drive resistor, the IGBT capacitance, trans-conductance and switching process. An inverter employing a switching pattern as sinusoidal PWM (SPWM) was designed and experiment was carried out to test the switching waveforms under different output currents. Switching loss under different currents was also measured and compared with calculated value using mathematical equation proposed in this paper.

The grid-connected VSC system with LCL filter has resonance problems which will magnify the harmonics near the resonant frequency and result in a low stability margin and complex design of current regulators. In this paper, a novel control strategy is proposed by introducing the feedforward compensatory controls of state variables and grid voltage, which can not only lessen the system order from the third-order to the first-order but also reject the current distortions arising from grid voltage disturbances, such as surge, sag or harmonics. Therefore, with the proposed strategy, the system stability margin is enlarged and the design of current regulators is simplified greatly. Besides, a sensorless solution is also proposed to lower the cost of the system. Especially, with the sensorless solution, the system can also avoid disturbances from the local load. Theoretical analysis simulation and experimental results verified the proposition.

A resonant current-fed push-pull converter with active clamping is investigated for vehicle inverter application in this paper. A communal clamping capacitor and a voltage doubler topology are employed. Moreover, two kinds of resonances to realize ZVS ON of MOSFETs or to remove reverse-recovery problem of secondary diodes are analyzed and an optimized resonance is utilized for volume restriction. At last, a 150W prototype with 10V to 16V input voltage, 360V output voltage is implemented to verify the design.

In this paper, a three-phase high power factor Multilevel Current-Source Rectifier (MCSR) is developed. The structure of the given MCSR consists of three modules of current-source, three-phase six-valve converters and some sharing-current inductors. The operation characteristics of the MCSR are investigated. In the MCSR, Carrier Phase-Shifted SPWM is used. Harmonic characteristics of the ac input current and the dc output voltage and current are analyzed in detail. It is shown that, many good features can be achieved such as equivalent higher carrier frequency at the ac side of the MCSR even with lower switching frequency. Furthermore, dc output voltage has no low harmonic components, and the power factor of the ac side is easy to control to be unit. A fully digital solution of tri-logic SPWM gating signals for the MCSR is studied based on the DSP and FPGA platform. At last, simulated and experimental results are given to demonstrate the proposition.

Three-phase current source PWM converters require tri-logic PWM control technique. From the point of view of digital control, implementation of tri-logic PWM, especially for multi-module current source converters (CSCpsilas), is much more complex than that for a single CSC. Aiming at digital controls of multi-module CSCpsilas, the digital solution of tri-logic SPWM scheme is investigated in this paper. A tri-logic carrier phase-shifted SPWM control system is presented based on DSP and FPGA hardware platform. The fully digital control of the multi-module CSCpsilas is realized. The experiment on a three-module current source inverter (CSI) with carrier phase-shifted SPWM gives the verification.

A Generalized three-phase multilevel current source inverter (CSI) structure is proposed in this paper. The novel multilevel CSI topology consists of n modules of current-source, three-phase six-valve converters and 2(n-1) sharing-current inductors. These inductors divide the dc link current into n-l different current ratings, and these current ratings are used to make up of 2n+1 current levels at the output of the CSI. In this structure, the bulky transformers in the ac side of the conventional CSI are eliminated, and current equilibrium problem of sharing-current inductors can be solved by redundant switching combination states. The operation principle and control strategy of the five-level inverter are analyzed in detail. The implementation of carrier phase-shifted SPWM scheme is investigated for digital control of the novel multi-module CSI structure. Simulated and experimental results demonstrate the proposition.

Multilevel converters offer benefits of reduced harmonics and increased power ratings compared to their two level counterparts, but to date most of the research in this area has been directed towards voltage source inverters rather than current source inverters. Partly, this is because DC link capacitors are a more effective energy storage medium than link inductors, with less losses and easier operating requirements. However, for higher power applications, and with improvements in inductors using superconducting magnetic energy storage systems (SMES), current source inverters can have particular advantages in some circumstances. Hence it is useful to explore how a multilevel CSI system might be managed. This paper presents a 6-switch single-phase 5-level current source inverter, and compares its topology to a previously reported 8-switch system. For both converter topologies, it is identified that control of the intermediate 1/2-level DC link current is a major challenge, and a closed loop strategy is proposed to control this current under varying load conditions. Simulation and experimental results are presented to confirm the operation of the new 6-switch topology under PWM control, and to verify that the 1/2-level link current can be maintained at half of the total DC current with very little current ripple under differing load conditions.