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Your search keyword '"Zhou, Zhihao"' showing total 34 results
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34 results on '"Zhou, Zhihao"'

13. Spatial Narrowing of Two-Photon Imaging in a Silicon CCD Camera.

Author

Liu, Wei, Shen, Dongyi, Zhao, Guolin, Yan, Hengzhe, Zhou, Zhihao, and Wan, Wenjie

Abstract

Imaging based on nonlinear two-photon absorption can offer an attractive alternative for the traditional one-photon imaging scheme with many potential benefits of imaging resolution, speed, and ability to image through scattering media. Here we experimentally demonstrate a direct imaging scheme based on two-photon absorption in the conventional silicon CCD camera and observe a spatial narrowing effect in its imaging. This technique, compared with its one-photon counterpart, exhibits a better imaging resolution and signal-to-noise ratio, thanks to the nonlinear nature of the two-photon absorption process. This nonlinear imaging scheme opens up an avenue for rapid real-time and high-resolution imaging through scattering media like rain, fog, and biomedical samples. [ABSTRACT FROM AUTHOR]

Published
2022
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22. Design and Test of 40-kV/2-kA DC Superconducting Fault Current Limiter.

Author

Qiu, Qingquan, Xiao, Liye, Zhang, Jingye, Zhang, Zhifeng, Song, Naihao, Jing, Liwei, Zha, Wenhan, Du, Xiaoji, Teng, Yuping, Zhou, Zhihao, Zhang, Guomin, and Xia, Dong

Subjects
SUPERCONDUCTING fault current limiters, TEST design, FAULT currents, FAULT current limiters, CRITICAL currents, SUPERCONDUCTING magnets
Abstract

In this article, a general scheme of a 40-kV/2-kA resistive type dc superconducting fault current limiter (SFCL) is suggested, which could be utilized to suppress the surge current caused by short-circuit faults in voltage-source-converter HVdc (VSC-HVdc) power grids. This dc SFCL is designed and fabricated with 6 coil modules in parallel and 4 in series. In order to investigate the current-limiting performance of the dc SFCL under the rapidly rising fault current, the SFCL is tested on the platform with a pulsed dc impact generator. Besides the property of current limitation, the current capacity, insulation and quench recovery performance of such SFCL are also tested. Results indicate that the critical current of SFCL is larger than 2050 A at 69 K, and the dc withstand voltage is larger than 74 kV in 2 h. During the 9-kV dc impact test, the short-circuit current could be limited to 8842 A, and the quench recovery time is less than 200 ms. [ABSTRACT FROM AUTHOR]

Published
2020
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29. A 33-ppm/°C 240-nW 40-nm CMOS Wakeup Timer Based on a Bang-Bang Digital-Intensive Frequency-Locked-Loop for IoT Applications.

Author

Ding, Ming, Zhou, Zhihao, Traferro, Stefano, Liu, Yao-Hong, Bachmann, Christian, and Sebastiano, Fabio

Subjects
*PINK noise, *BEHAVIORAL assessment, *DIGITAL filters (Mathematics), *DIGITAL electronics, *FREQUENCY stability, *COMPLEMENTARY metal oxide semiconductors
Abstract

This paper presents a wakeup timer in 40-nm CMOS for Internet-of-Things (IoT) applications based on a bang-bang Digital-intensive Frequency-Locked Loop (DFLL). A self-biased $\Sigma \Delta $ Digitally Controlled Oscillator (DCO) is locked to an RC time constant via a feedback loop consisting of a single-bit chopped comparator and a digital loop filter, thus maximizing the use of digital circuits while keeping only the RC network and the comparator as the sole analog blocks. Analysis and behavior level simulations of the DFLL have been carried out to guide the optimization of the long-term stability and frequency accuracy of the timer. High frequency accuracy and a $10\times $ enhancement of long-term stability is achieved by the adoption of chopping to reduce the effect of comparator offset and 1/f noise and by the use of $\Sigma \Delta $ modulation to improve the DCO resolution. Such highly digitized architecture fully exploits the advantages of advanced CMOS processes, thus enabling operation down to 0.7 V and a small area (0.07 mm2). The proposed timer achieves the excellent energy efficiency (0.57 pJ/cycle at 417 kHz at 0.8-V supply) over prior art while keeping excellent on-par long-term stability (Allan deviation floor < 20 ppm) and temperature stability (33 ppm°Cat 0.8-V supply). [ABSTRACT FROM AUTHOR]

Published
2020
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34. A Learning-Free Method for Locomotion Mode Prediction by Terrain Reconstruction and Visual-Inertial Odometry.

Author

Zhao S, Yu Z, Wang Z, Liu H, Zhou Z, Ruan L, and Wang Q

Subjects
Humans, Walking, Learning, Lower Extremity, Locomotion, Robotics
Abstract

This research introduces a novel, highly precise, and learning-free approach to locomotion mode prediction, a technique with potential for broad applications in the field of lower-limb wearable robotics. This study represents the pioneering effort to amalgamate 3D reconstruction and Visual-Inertial Odometry (VIO) into a locomotion mode prediction method, which yields robust prediction performance across diverse subjects and terrains, and resilience against various factors including camera view, walking direction, step size, and disturbances from moving obstacles without the need of parameter adjustments. The proposed Depth-enhanced Visual-Inertial Odometry (D-VIO) has been meticulously designed to operate within computational constraints of wearable configurations while demonstrating resilience against unpredictable human movements and sparse features. Evidence of its effectiveness, both in terms of accuracy and operational time consumption, is substantiated through tests conducted using open-source dataset and closed-loop evaluations. Comprehensive experiments were undertaken to validate its prediction accuracy across various test conditions such as subjects, scenarios, sensor mounting positions, camera views, step sizes, walking directions, and disturbances from moving obstacles. A comprehensive prediction accuracy rate of 99.00% confirms the efficacy, generality, and robustness of the proposed method.

Published
2023
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