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This paper presents a new job release methodology: WIPLOAD Control (WIPLCtrl), which is a workload limited release methodology for the overall shop floor. The behaviour of WIPLCtrl is analyzed using the Markov process model of a transfer line system to observe the potential advantage of WIPLCtrl relative to the conventional measure of system workload using the WIP level. A simulation experiment is then conducted considering a simplified semiconductor wafer fabrication system. The performance of WIPLCtrl is compared with that of an open-loop release methodology and three other closed-loop workload limited release methodologies. A case study is also carried out by simulating a real-life wafer fabrication, considering the complexities and the distinguishing features of semiconductor manufacturing. The experimental results indicate that WIPLCtrl is an efficient job release methodology, capable of reducing both the mean and the standard deviation of the cycle time for a given throughput level. The performance ...

With the advent of the Just-In-Time (JIT) manufacturing philosophy, scheduling problems with delivery performance have received significant attention in recent years. The JIT concept requires not only a penalty for lateness but also for earliness and therefore both early and tardy deliveries are highly discouraged. In this paper, the dynamic scheduling of a single batch processing machine has been addressed for controlling the delivery performance between earliness and tardiness measures. A Look Ahead Batching (LAB) strategy has been proposed. In LAB, the scheduling decisions are made considering the arrival epochs and due dates of the incoming lots, which are easily predictable in a computer-integrated manufacturing environment, especially in the semiconductor industry. LAB strategy is used to control the delivery performance, which involves a trade-off between the conflicting objectives of minimizing earliness- and tardiness-related measures simultaneously. The potential of LAB strategy in controlling d...

The paper studies the problem of synchronizing air transportation and assembly manufacturing to achieve accurate delivery with minimized cost in a consumer electronics supply chain. The motivation for this study came from a major computer manufacturer in a consumer electronics industry that faces challenges in the final stages of delivery of a supply chain. The synchronization problem is decomposed and formulated as two sub-problems, i.e. a multi-destination air transportation allocation problem and an assembly-scheduling problem. The first sub-problem is formulated and solved as an integer linear programming problem. For the assembly-scheduling problem, two solution methodologies using the concepts of forward and backward scheduling are presented. Computational results indicate that the proposed methodologies can achieve considerable cost reduction compared with the existing methodology applied in industry.

A key performance parameter of a manufacturing network or supply chain is its cycle time; the time that a typical item spends in the network. A previous simulation study on a semiconductor assembly and test facility showed that cycle times could be reduced by having smooth input and service rates. This suggested that there is a “cycle time principle” that, for a system with a specified throughput or input rate, the shortest cycle times are obtained when the input and service rates do not vary over time. We prove that this principle is true for the M/G/1 and M/M/s queueing systems and Jackson networks. The analysis involves establishing several results on the concavity of waiting time probabilities and the convexity of expected waiting times and queue lengths, as functions of input and service rates. These results also have natural uses in other optimization problems.