33 results on '"Endoh, T."'
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2. Influence of Iridium Sputtering Conditions on the Magnetic Properties of Co/Pt-Based Iridium-Synthetic Antiferromagnetic Coupling Reference Layer
3. Effect of Magnetic Coupling Between Two CoFeB Layers on Thermal Stability in Perpendicular Magnetic Tunnel Junctions With MgO/CoFeB/Insertion Layer/CoFeB/MgO Free Layer
4. Perpendicular Magnetic Tunnel Junctions With Four Anti-Ferromagnetically Coupled Co/Pt Pinning Layers
5. First Demonstration of 25-nm Quad Interface p-MTJ Device With Low Resistance-Area Product MgO and Ten Years Retention for High Reliable STT-MRAM
6. Structural Analysis of CoFeB/MgO-Based Perpendicular MTJs With Junction Size of 20 nm by STEM Tomography
7. Influence of Hard Mask Materials on the Magnetic Properties of Perpendicular MTJs With Double CoFeB/MgO Interface
8. Novel Quad-Interface MTJ Technology and its First Demonstration With High Thermal Stability Factor and Switching Efficiency for STT-MRAM Beyond 2X nm
9. Insertion Layer Thickness Dependence of Magnetic and Electrical Properties for Double-CoFeB/MgO-Interface Magnetic Tunnel Junctions
10. Critical Role of W Insertion Layer Sputtering Condition for Reference Layer on Magnetic and Transport Properties of Perpendicular-Anisotropy Magnetic Tunnel Junction
11. Impact of Tungsten Sputtering Condition on Magnetic and Transport Properties of Double-MgO Magnetic Tunneling Junction With CoFeB/W/CoFeB Free Layer
12. Improvement of Thermal Tolerance of CoFeB–MgO Perpendicular-Anisotropy Magnetic Tunnel Junctions by Controlling Boron Composition
13. Driving Force in Diffusion and Redistribution of Reducing Agents During Redox Reaction on the Surface of CoFeB Film
14. Novel ultrahigh-density flash memory with a stacked-surrounding gate transistor (S-SGT) structured cell
15. 0.18-μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation
16. An on-chip 96.5% current efficiency CMOS linear regulator using a flexible control technique of output current
17. 2.4F/sup 2/ memory cell technology with stacked-surrounding gate transistor (S-SGT) DRAM
18. Early phase analysis of OCTS radiance data for aerosol remote sensing
19. New three-dimensional memory array architecture for future ultrahigh-density DRAM
20. A new write/erase method to improve the read disturb characteristics based on the decay phenomena of stress leakage current for flash memories
21. Infrared focal plane array incorporating silicon IC process compatible bolometer
22. Control method for a combined active filter system employing a current source converter and a high pass filter
23. Reliability issues of flash memory cells
24. Development of a method of partial discharge detection in extra-high voltage cross-linked polyethylene insulated cable lines
25. Pattern recognition of partial discharge in XLPE cables using a neural network
26. Thick film resistors for AlN ceramics
27. Laser trimming of thick film metal resistors on aluminum nitride substrates
28. Ag-Pd thick film conductor for AlN ceramics
29. A high-density NAND EEPROM with block-page programming for microcomputer applications
30. An accurate model of subbreakdown due to band-to-band tunneling and some applications
31. Laser trimming of thick film resistors on aluminum nitride substrates
32. An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell
33. The influence of moisture on surface properties and insulation characteristics of AlN substrates
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