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The carrier frequency harmonics and significant high-frequency energy of electromagnetic interference (EMI) produced is a major concern in pulse width modulation (PWM) circuit. This paper proposes a chaotic PWM generator for the reduction of EMI. The chaotic CMOS circuit presented is based on a stroboscopic map to realize the chaotic sequence generator, and then, this chaotic frequency generator is used to replace the constant-frequency generator. The main components of the chaotic PWM circuit are chaotic sequence generator for the chaotic triangle waveforms, the chaotic frequency modulation circuit based on one chip. The chaotic PWM generator is fabricated by a 0.35 μ m standard CMOS process. The energy peak of EMC experiment values are all within the limit of CISPR 22. The peak EMI reduction of the proposed chaotic PWM is 12.85 dB. The experiments show the effectiveness of the proposed CMOS chaotic PWM in reducing EMI.

This paper presents a bulk-driven CMOS amplifier with high immunity to electromagnetic interference (EMI). The approach is based on a bulk-driven input stage of MOSFET, thereby providing a low-voltage realization of a gate-driven stage. The bulk-driven amplifier includes the positive feedback, an input voltage drop, and dual input-stage symmetrical topology to improve the equivalent transconductance, dc linearity, and ac performance. As demonstrated by the measurements, the dc offset of the proposed amplifier is less than 70 mV, the measured PSD is about −66 dBm with 1 − V pp EMI conveyed. The amplifier chip is implemented using a 0.35 μm standard CMOS process with a 1-V power supply.

This paper proposes an 8-bit grayscale AMOLED driver IC with a mixed modulation DAC. This architecture maintains a digital logic component, high-precision 8-bit compensated gamma correction and an output amplifier buffer with low-complexity configuration for the AMOLED display panel. The proposed driver IC with gamma correction consists of a 6-bit resistor-string DAC and a 2-bit polynomial interpolation current-modulation sub-DAC. The two-stage DAC leads to a more compact die size than conventional 8-bit resistor-string DAC, and the polynomial interpolation method provides higher accuracy gray level voltages than linear methods. The source driver IC of the 240 RGB AMOLED display was implemented in the 0.35 $\mu$ m CMOS process with a die area of 2.95 $\times$ 8.9 mm $^{2}$ , including a digital core area of approximately 7.0 $\times$ 1.0 mm $^{2}$ . The DNL and INL of the proposed mixed modulation DAC are of 0.43 LSB and, 0.4 LSB, respectively.