27 results on '"Lin, Chia-Chun"'
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2. Majority Logic Circuit Minimization Using Node Addition and Removal
3. LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach
4. A New Necessary Condition for Threshold Function Identification
5. LOOPLock: Logic Optimization-Based Cyclic Logic Locking
6. Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments
7. On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses
8. An Efficient Indexing Method for Skyline Computations with Partially Ordered Domains
9. PAQCS: Physical Design-Aware Fault-Tolerant Quantum Circuit Synthesis
10. Impact of Interfacial Layer Position on Resistive Switching Behaviors for ZrTiOx-Based Metal–Insulator–Metal Devices
11. FTQLS: Fault-Tolerant Quantum Logic Synthesis
12. Surface Passivation of Ge MOS Devices by ${\rm SmGeO}_{\bf{x}}$ With Sub-nm EOT
13. One-Time Programmable Memory Based on ${\rm ZrTiO}_{x}$ Antifuse for Crossbar Memory Application Featuring High Speed Operation and Low Power Consumption
14. MIM Capacitors Based on ${\rm ZrTiO}_{\rm x}/{\rm BaZr}_{\rm y}{\rm Ti}_{\rm 1-y}{\rm O}_{3}$ Featuring Record-Low VCC and Excellent Reliability
15. Optimized Quantum Gate Library for Various Physical Machine Descriptions
16. Crystalline ZrTiO$_{\bf 4}$-Gated Ge Metal–Oxide–Semiconductor Devices With Amorphous Yb$_{\bf 2}$O$_{\bf 3}$ as a Passivation Layer
17. Improved Leakage and Reliability for ${\rm ZrLaO}_{x}/{\rm ZrTiO}_{x}/{\rm ZrLaO}_{x}$-Based MIM Capacitors by Plasma Nitridation
18. Electrical Characteristics for Flash Memory With Germanium Nitride as the Charge-Trapping Layer
19. $\hbox{ZrLaO}_{x}\hbox{/ZrTiO}_{x}\hbox{/ZrLaO}_{x}$ Laminate as Insulator for MIM Capacitors With High Capacitance Density and Low Quadratic Voltage Coefficient Using Canceling Effect
20. Effect of Nitrogen Passivation on the Performance of MIM Capacitors With a Crystalline- $\hbox{TiO}_{2}/\hbox{SiO}_{2}$ Stacked Insulator
21. MOS Devices With High-κ (ZrO$_2$) $_x$(La $_2$O$_3$) $_{1-x}$ Alloy as Gate Dielectric Formed by Depositing ZrO $_2$/La$_2$O $_3$/ZrO$_2$ Laminate and Annealing
22. Integration of Amorphous $\hbox{Yb}_{2}\hbox{O}_{3}$ and Crystalline $\hbox{ZrTiO}_{4}$ as Gate Stack for Aggressively Scaled MOS Devices
23. $\hbox{ZrTiO}_{x}$-Based Resistive Memory With MIS Structure Formed on Ge Layer
24. MIM Capacitors With Crystalline-$\hbox{TiO}_{2}/ \hbox{SiO}_{2}$ Stack Featuring High Capacitance Density and Low Voltage Coefficient
25. High-Performance Metal–Insulator-Metal Capacitor Using Stacked $\hbox{TiO}_{2}/\hbox{Y}_{2}\hbox{O}_{3}$ as Insulator
26. Comparison of Ge Surface Passivation Between $ \hbox{SnGeO}_{x}$ Films Formed by Oxidation of Sn/Ge and $ \hbox{SnGe}_{x}/\hbox{Ge}$ Structures
27. Nonvolatile Memory With Nitrogen-Stabilized Cubic-Phase $\hbox{ZrO}_{2}$ as Charge-Trapping Layer
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