52 results on '"Luo Xiaorong"'
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2. 600 V/7 A Large-Size RESURF β-Ga2O3 Schottky Barrier Diode With High-Temperature Storage Test
3. Simulation Study of a Novel Low-Loss N-Channel SOI LIGBT With a Self-Adapted Parasitic Thyristor
4. Thermal and Electrical Study of Single-Event Burnout and Hardening in 600 V Lateral DMOSFETs With Optimized Trench Drain
5. Novel Ultrafast Low-Loss LIGBT With Reverse-Conduction Capability
6. High-Current and Short-Circuit Capability SOI-LIGBT With Double-Integrated Self-Adapted MOS-Resistors
7. Fast-Switching and Low-Loss SOI LIGBT With Recombination Electrode and Double U-Shaped P-Regions
8. An Improved Evaluation Method for the Short-Circuit Withstand Capability of Press-Pack IGBT Modules
9. Low Turn-On Voltage and High Breakdown Voltage β-Ga2O3 Diode With Fin Channel and Ohmic Contact Anode
10. Novel Ultralow Loss SOI LIGBT With a Self-Adaptive pMOS and Double Floating Ohmic Contacts
11. Low Reverse Conduction Loss $\beta $-Ga$_{\text{2}}$O$_{\text{3}}$ Vertical FinFET With an Integrated Fin Diode
12. Nonuniform Mechanism for Positive and Negative Bias Stress Instability in β-Ga2O3 MOSFET
13. Experimental Investigation on Threshold Voltage Instability for β-Ga2O3 MOSFET Under Electrical and Thermal Stress
14. High-Voltage Polarization-Superjunction GaN HEMT With Built-In SBD for Low Reverse Conduction Loss
15. A Novel IGBT With Voltage-Clamping for Turn-on Overshoot Suppression Under Hard-Switching
16. Experimental Study on Static and Dynamic Characteristics of Ga2O3 Schottky Barrier Diodes With Compound Termination
17. Experimental Realization of Ultralow ON-Resistance LDMOS With Optimized Layout
18. Low Switching Loss and EMI Noise IGBT With Self-Adaptive Hole-Extracting Path
19. Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes
20. Experimental Study of 600 V Accumulation-Type Lateral Double-Diffused MOSFET With Ultra-Low On-Resistance
21. A Novel High Voltage Ultra-Thin SOI-LDMOS With Sectional Linearly Doped Drift Region
22. An Injection Enhanced LIGBT on Thin SOI Layer Compatible With CMOS Process
23. A Snapback-Free and Low-Loss Shorted-Anode SOI LIGBT With Self-Adaptive Resistance
24. Ultrafast and Low-Turn-OFF Loss Lateral IEGT With a MOS-Controlled Shorted Anode
25. AlGaN/GaN MIS-HEMT With AlN Interface Protection Layer and Trench Termination Structure
26. A High Bidirectional Blocking Capability Insulated-Gate Bipolar Transistor With Ultralow Loss
27. A Carrier Stored SOI LIGBT With Ultralow ON-State Voltage and High Current Capability
28. Characterization and Performance Evaluation of the Superjunction RB-IGBT in Matrix Converter
29. Simulation Study of a Novel Snapback-Free and Low Turn-Off Loss Reverse-Conducting IGBT With Controllable Trench Gate
30. Novel Superjunction LDMOS (>950 V) With a Thin Layer SOI
31. A Snapback-Free Fast-Switching SOI LIGBT With Polysilicon Regulative Resistance and Trench Cathode
32. Ultra-Low On-Resistance LDMOS With Multi-Plane Electron Accumulation Layers
33. Optimization and New Structure of Superjunction With Isolator Layer
34. The $R_{\mathrm{\scriptscriptstyle ON},\mathrm {min}}$ of Balanced Symmetric Vertical Super Junction Based on R-Well Model
35. An Ultralow Loss Superjunction Reverse Blocking Insulated-Gate Bipolar Transistor With Shorted-Collector Trench
36. A Split Gate Power FINFET With Improved ON-Resistance and Switching Performance
37. Ultralow ON-Resistance SOI LDMOS With Three Separated Gates and High- $k$Dielectric
38. Ultralow ON-Resistance High-Voltage p-Channel LDMOS With an Accumulation-Effect Extended Gate
39. Optimization of Lateral Superjunction Based on the Minimum Specific ON-Resistance
40. High-Voltage Thin-SOI LDMOS With Ultralow ON-Resistance and Even Temperature Characteristic
41. Analytical Model and New Structure of the Variable- $k$Dielectric Trench LDMOS With Improved Breakdown Voltage and Specific ON-Resistance
42. A RESURF-Enhanced p-Channel Trench SOI LDMOS With Ultralow Specific on-Resistance
43. Ultralow Specific On-Resistance Superjunction Vertical DMOS With High-$K$ Dielectric Pillar
44. Low on-Resistance SOI Dual-Trench-Gate MOSFET
45. Ultralow Specific On-Resistance High-Voltage SOI Lateral MOSFET
46. Numerical and Experimental Investigation on a Novel High-Voltage ( $>$ 600-V) SOI LDMOS in a Self-Isolation HVIC
47. Novel Low-$k$ Dielectric Buried-Layer High-Voltage LDMOS on Partial SOI
48. Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator
49. Eliminating Back-Gate Bias Effects in a Novel SOI High-Voltage Device Structure
50. Realization of High Voltage ($≫ \hbox{700}$ V) in New SOI Devices With a Compound Buried Layer
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