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With the advent of 5G, software-defined radios (SDRs), and ultra-wideband systems, there is a rapid rise in the demand for reconfigurable RF front ends. Conventional methods of using filter banks or cascading multiple devices to achieve wideband performance would result in bulky hardware. Devices that can change their characteristics and respond in a controlled manner to a desired input are suitable for such designs. In filtering applications, the most desirable adaptive features include band-switching capabilities, the use of a cutoff frequency and/or bandwidth tuning, and a change in filter response from passband to stopband. Periodic structures have demonstrated great potential in achieving these characteristics. Refereed/Peer-reviewed

An edge-coupled meandered three-coupled-line Marchand balun with a partial ground plane implemented in 0.13 $\mu \text{m}$ SiGe Bi-CMOS technology is presented in this brief. The balance performance of the designed balun is significantly improved by creating a ‘no ground plane’ beneath the coupled-line structure, which is demonstrated by simulating two baluns: one with a partial ground and the other with a solid ground underneath. The measured amplitude and phase imbalances are less than 0.4 dB and 2.5°, across the 3-dB bandwidth from 21.5 to 95 GHz, surpassing previously reported results of edge-coupled Marchand baluns. The balun occupies 230 $\mu \text{m}\,\,\times370\,\,\mu \text{m}$ .

A 1-D finite electromagnetic bandgap (EBG) periodic structure is studied. In the structure, EBG behaviour arises from a unit cell comprised of a metallic patch sandwiched between microstrip line and ground plane. Reactive loading offered by patch size determines the bandgap position. A detailed parametric study of various physical structure parameters is presented as a basis to develop a interrelation between physical parameters of the structure and cutoff frequencies. Closed-form synthesis equations are then formulated using curve fitting techniques. Subsequently, a step-by-step design methodology is presented to get a close first pass approximation of structure dimensions for a given specification. This design method reduces the effort required for a designer to perform extensive electromagnetic simulations at early stages of the design. The proposed synthesis method is tested for a variety of commercially available substrates and different frequency ranges for validation. Comparison with electromagnetic (EM) simulations and measurement show that the proposed synthesis method provides first pass approximation of the physical structure dimensions with 94% accuracy. Refereed/Peer-reviewed

This paper presents a systematic study of a compact and reconfigurable periodic structure in GaAs MMIC technology. Compactness is achieved by the introduction of spiral inductors in a conventional unit cell without disturbing the reactive loading mechanism. The proposed architecture exhibits a 28.3% wider stopband with 62.6% smaller footprint compared to a conventional structure. The compactness and bandwidth improvement in the proposed structure is explained with the help of dispersion and circuit analysis. The reconfigurability built into the design using PIN diodes allows stopband switching, dual-band operation and tuning capabilities with the mere use of a single reactive load in its unit cell. To the best of the authors knowledge, it is the first time a reconfigurable MMIC implementation is realized using the proposed structure or even the conventional design. As a guide to design, sensitivity analysis to filter performance is presented for important structure parameters. Switching element parasitics are discussed in two ways: firstly, with the design and measurement of structures with idealized switching conditions and in second, with the circuit and full-wave EM modelling of the finite periodic structure with the actual PIN diodes. The on-chip measurements of the fully reconfigurable filter show excellent agreement with simulations Refereed/Peer-reviewed

In this paper, an eddy current loop coupled with the tunneling magneto resistor (EC-TMR) is used as a displacement sensor to detect the micromotion of an orthopaedic implant. The high sensitivity and signal to noise ratio of the TMR sensor are used to achieve high resolution at a large standoff distance. First, a small three-turn rectangular eddy current loop of dimension $2.5\,\,\text {mm} \times 10$ mm is designed and simulated inside the human body using a full-wave EM simulator. Then, it is fabricated and tested using vector network analyzer. The magnetic tunnel junction stack is optimized and a six-element TMR sensor is fabricated and characterized. The eddy current and tunnelling magneto resistive sensor are integrated and heterodyne detection technique is used to obtain the high-resolution micromotion detection at an extended standoff range. This technique can be used for in-vivo detection of the micromotion of the orthopaedic implant which will be useful in reducing the revision surgeries due to the mechanical failures of the implant.

© 2001-2012 IEEE. A highly accurate location estimation of a capsule endoscope in the gastrointestinal tract in the range of several millimeters is a challenging task, as radio-frequency signals encounter high power loss and a highly dynamic channel propagation environment. Therefore, an accurate path-loss model is required for the development of accurate localization algorithms. This paper presents an in-body path-loss model for the human abdomen region at 2.4 GHz. To develop the path-loss model, electromagnetic simulations using the finite-difference time-domain method were carried out on three different anatomical human models from the Virtual Family. A mathematical expression for the path-loss model was proposed based on analysis of the measured loss at different capsule locations inside the small intestine. The proposed path-loss model is a good approximation to model in-body RF propagation, since real measurements are not completely practical for the capsule-endoscope subject. Based on the proposed path-loss model, the article also presents the 2-D location estimation of a capsule endoscope inside the small intestine using the trilateration method as well as the non-linear least squares algorithm. It is shown that with 90% probability, the location estimation error is less than 4 cm.

Measurement results performed on a GaN high-electron-mobility transistor that show the presence of a double-energy-level (DEL) trap center in the device are presented. A novel, yet simple, circuit implementation of a DEL trap center in an FET is presented that is immediately extendableto a trap centerwithmore than two energy levels. The model is based on the Shockley–Read–Hall statistics of the trapping process. The implementation is suitable for both time-domain and harmonic-balance simulations. Simulation results validate the proposed model.

The temperature response of field-effect transistors (FETs) to instantaneous power dissipation has been shown to be significant at high frequencies, even though the self-heating process has a very slow time constant. This affects intermodulation at high frequencies. A major difficulty in characterizing the self-heating process in microwave FETs is to differentiate between the self-heating and charge-trapping rates. An iso-trapping measurement technique is proposed by which it becomes possible to characterize the self-heating process in an FET in isolation from the effect of the charge-trapping process in the FET. The results of iso-trapping measurements performed on a GaN high-electron-mobility transistor are presented, and used to successfully characterize the self-heating process.

© 2016 IEEE. This paper presents a theoretical analysis for location estimation of a wireless capsule endoscope (WCE) in the small-intestine region. Under three different shadowing scenarios by assuming standard deviation of the shadowing with the constant variance, parameter-dependent variance, or correlated and parameter-dependent variance, analytical formulas are derived for the Cramér-Rao lower bound (CRLB) for capsule positioning when distance and azimuth angle measurements are employed to estimate the location of the capsule. The CRLB analysis can be employed to quantify the best achievable location estimation performance. We also present some numerical results to show the CRLB for three scenarios. The results show that in the most realistic scenario, when the shadowing is spatially correlated and distance dependent and the standard deviation of noise is 7 dB, the maximum square root of CRLB is 3.8 mm. Moreover, the square root of CRLB experiences its minimum value of 2 mm, when the capsule is away from its first location about half of the capsule length. Overall, the result of this paper suggests that it is possible to use received signal strength such as measured by a radar system for location estimation of a WCE.

A compact balanced frequency doubler with more than 35 dB odd-harmonic rejection and fractional bandwidth of 73% is presented in this letter. Wide bandwidth and high odd-harmonic suppression is achieved by adopting a new technique for the transformer balun design, resulting in a very low magnitude imbalance of 0.13 dB and a phase imbalance of 0.4° over 7–15 GHz. The balun performance is improved by offsetting the radius of the primary and secondary coils, which reduces the parasitic coupling capacitance. The input and output frequency ranges for the doubler are 7–15 GHz and 14–30 GHz respectively. The circuit was fabricated in 0.13- $\mu \text{m}$ SiGe technology. The chip size is 0.6 mm $\times \, 0.4$ mm.

The results of measurements performed on a GaN high electron-mobility transistor (HEMT) by two different pulse-measurement techniques are presented. By performing two-stage pulse measurements, two distinct current-injection mechanisms responsible for triggering the trapping process are identified. By performing three-stage pulse measurements, the trap center at which the trapping process occurs is identified to be a double-energy-level trap center, which is a trap center with two distinct energy levels between which there is an interaction. This result has a significant impact on the design of more accurate large signal models for GaN HEMTs.

An on-chip resonator is designed and fabricated using a standard 0.13- $\mu \text{m}$ SiGe technology for millimeter-wave applications. The designed resonator is based on a unique structure, which consists of two broadside-coupled meander lines with opposite orientation. The equivalent $LC$ circuit of the resonator is given, while the impact of the structure on the resonance frequencies is investigated. Using this structure along with capacitors, a compact bandpass filter (BPF) is also designed and fabricated. The measured results show that the resonator can generate a resonance at 57 GHz with the attenuation better than 13.7 dB, while the BPF has a center frequency at 31 GHz and a insertion loss of 2.4 dB. The chip size of both the resonator and the BPF, excluding the pads, is only 0.024 mm2 ( $0.09 \times 0.27$ mm $^{2})$ .

A higher frequency, over 2 GHz, is suggested for current 4G or 5G wideband applications. By adopting a unique gain control method, an analog-controlled variable-gain amplifier (VGA) with an accurate dB-linear characteristic is presented. The designed VGA not only features large bandwidth, but also has accurate gain adjustment with a relatively wide control voltage range. The VGA has a measured gain range of 24 dB, of which 17.3 dB is dB-linear with less than $\pm$ 0.3-dB gain error. The $-$ 3-dB bandwidth is relatively constant from 2 to 2.2 GHz for the entire dB-linear range. An output 1-dB compression point of 1.8 dBm and a noise figure of 24 dB are measured. Due to the simple structure, the current consumption of the VGA core is only 2.9 mA from a 1.2-V supply, and the size is only ${\hbox{225}}\ \mu{\hbox{m}}\times {\hbox{45}}\ \mu{\hbox{m}}$ , excluding pads. Moreover, the robustness of the designed VGA is verified by means of Monte Carlo simulation.

The temperature-dependent thermal conductivities of a GaAs pseudomorphic high-electron mobility transistor’s (pHEMT) substrate and epilayer regions are extracted to develop a 3-D finite-element-method thermal model. The thermal characterization is based on electrical gate-metal-finger temperature measurements of a customized GaAs pHEMT test structure. Heat flow from an integrated thin-film resistor is shown to be sensitive to the device’s substrate thermal conductivity, while heat flow from the device’s channel is most significantly affected by the epilayer region thermal conductivity. These observations are used in the formulation of the thermal parameter extraction technique, which serves as a useful and convenient device modeling tool that can be integrated into an engineering design flow. Specific knowledge about the semiconductor material fabrication process, which may be unavailable to the design engineer, is not required for accurate thermal characterization; this is the overriding advantage of the technique presented.

The thermal impact of device bias-state and structures (such as source connected field plates, gate-pitch, back-vias, and number of gate fingers) in AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) are measured using gate metal resistance thermometry (GMRT). The technique characterizes the thermal response of device gate metallization to determine the gate-epilayer junction temperature (Tj), which is directly influenced by the channel heat source due to its close proximity. It is found that low gate leakage levels in GaN HEMTs make them favorable candidates for GMRT. Bias-dependent self-heating, independent of power dissipation, is observed in the devices. Therefore, Tj of different device configurations are compared at constant bias state, as well as constant power density (3.75 W/mm) to improve accuracy. Tj reduction is observed at high drain bias due to the migration of the channel heat source toward the gate field plate edge. This provides independent experimental validation for a reported electrothermal model [7]. A 3-D thermal finite element method model is presented, which simulates measured Tj rise to within ~6% across a range of device configurations and operating conditions. This is ultimately made possible upon implementation of a thermal boundary resistance layer and extraction of its temperature response using GMRT data.

Gate junction temperature is presented as the crucial parameter for modeling thermal degradation in GaAs device reliability studies, and sufficient for modeling the impact of temperature on device terminal characteristics. Gate metal resistance thermometry (GMRT) is applied to a GaAs pseudomorphic high-electron mobility transistor to measure its gate junction temperature. It is found that gate leakage current due to impact ionization can interfere with dc GMRT measurements. To the best of our knowledge, for the first time it is demonstrated that this can be largely avoided by instead applying an ac version of GMRT. However, the dynamic resistance of the gate leakage current path can interfere with ac GMRT. Measurements and thermal finite element method simulations of devices at constant power dissipation conclude that the bias dependence of the channel heat source profile affects the gate junction temperature. A parameter extraction technique is presented and used in device lifetime calculations to demonstrate MTTF variations of more than an order of magnitude (despite fixed power) due to bias-dependent self-heating.

Carbon nanotube (CNT) yarns are novel CNT-based materials that extend the advantages of CNT from the nanoscale to macroscale applications. In this study, we have modeled CNT yarns as potential data transmission lines. Test structures have been designed to measure electrical properties of CNT yarns, which are attached to these test structures using gold paste. DC testing and microwave S-parameter measurements have been conducted for characterization. The observed frequency independent resistive behavior of the CNT yarn is a very promising indicator that this material, with its added values of mechanical resilience and thermal conductivity, could be invaluable for a range of applications such as body area networks. A model is developed for the CNT yarn, which fits the measured data collected and agrees in general with similar data for non-yarn CNTs.

The integrated design flow that links simulation, layout, and electromagnetic (EM) analysis is the foundation for modern RF/microwave integrated circuit (IC) design. The inclusion of thermal simulation in this flow is now possible with modern thermal solvers linked into RF/microwave integrated design tools. Silicon germanium (SiGe) heterojunction bipolar transistor (HBT) power amplifier (PA) design is used as an example where such a flow is most beneficial due to numerous issues such as array sizing and thermal runaway. An electrothermal flow is discussed relative to some overall metrics for design flows and that incorporates the availability of an integrated thermal solver into the earliest parts of, and potentially throughout, the entire design flow. The result is a flow that potentially reduces iterations during the design process and boosts design performance by freeing up margin.

In summary, nonlinear modeling is not a trivial exercise: it is our version of rocket science. Compact models have served us well for many years, but there are several shortcomings that behavioral models can address. The industry is experiencing some very heady times for measurement-based models and the test and measurement systems needed to gener ate them. Great progress has been made, but more experience will be needed with measurement-based models before the caveat emptor-let the buyer beware-is completely understood. For this to be accelerated, measurement-based model use and mis use needs to be communicated in a timely manner in a format and within a forum where the collective effort can be freely, openly, and easily discussed with minimal ambiguity. The OWF is working to address this. Like S-parameters before, there will be an adoption period, but if measurement-based mod els live up to their promise, there are very exciting days ahead indeed.