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This letter presents the design of a broadband power amplifier (PA) that achieves, over the 0.45–3.4-GHz frequency band, an output power between 41.5 and 44.3 dBm and a power added efficiency (PAE) higher than 54%. A four-section transformer has been adopted as the output-matching network in order to target the impedance region defined by a simplified prediction of the power and efficiency contours. The designed PA can find application in flexible hardware for 5G applications, as well as in broadband radar and countermeasure systems.

The effects of the nonlinear drain-to-source capacitance ( $C_{\mathrm {DS}}$ ), or the varactor effect, on the operation of continuous-mode class-B/J power amplifiers (PAs) are described in terms of the mathematical analysis as well as experimental validation. The nonlinear $C_{\mathrm {DS}}$ generates harmonic current when the class-B/J drain voltage is applied across it, modifying the theoretical load trajectories on the Smith chart. This is shown to significantly deviate from the continuous-mode assertion of constant power and efficiency. A novel measurement approach called voltage–pull is used to investigate the effects of the second harmonic generation by the varactor in a class-B/J PA mode. Theoretical and experimental results showed the nonlinear $C_{\mathrm {DS}}$ degrades the drain efficiency compared to class-B on one half of the class-B/J design space while improving the other half due to the energy upconversion and downconversion, respectively. This paper provides an approach for die nonlinear characteristic optimizations for transistor manufacturers.

It has been established that the terminal radio frequency (RF) current and voltage (IV) waveforms are the unifying theoretical link between transistor technologies, circuit design, and system performance, and therefore, greatly influence the radio frequency power amplifier’s (RFPAs) performance [1]. Thus, it has become necessary to carry out detailed analysis of the time-varying RF voltage V(t) and current I(t) waveforms present on the device terminals for optimizing the output power and dc to RF power conversion efficiency of RFPAs. Alternatively, it can also be said that it has become a standard practice to identify the mode of operations of RFPAs by analyzing the V(t) and I(t) waveforms measured or simulated at the intrinsic terminals of the transistor. For example, Class A and Class F power amplifiers are represented by their respective current and voltage waveforms, as depicted in Fig. 1. It is apparent that in Class A, both the current and voltage waveforms are sinusoidal about the bias point, whereas in Class F, the current waveform is a half-wave rectified sinusoid, and the voltage waveform is a square wave [2], [3]. To experimentally support these established theoretical postulations with regard to current and voltage waveforms, there is a need for Waveform Engineering systems. In principle, waveform engineering is the ability to modify, in a quantified manner, the time-varying current and voltage waveforms present at the terminals of the transistor devices by changing the fundamental and harmonic impedances seen by the intrinsic transistor‘s access points. Effectively, the waveform engineering systems consist of two aspects, namely a waveform measurement component [1], [4], [5] and impedance tuning elements called the load-pull systems [6]–[8].

Electroluminescence microscopy and spectroscopy are used to compare the average hot-electron concentration and temperature under radio frequency (RF) operation class A, class B, and class F modes. From the results obtained, class A results, on average, in the highest hot-electron concentration, while class F is the mode with the lowest concentration due to its 'L'-shaped load line. The electron temperature extracted from the electroluminescence spectra is reduced with increasing RF power, reflecting the dominance of electroluminescence from the portion of the load line in the semi-on region. The electroluminescence method is not able to give substantial information on the portion of the load line with high field and low current density which will be responsible for the potentially damaging hottest electrons present in the channel.

In the design of most electronic circuits and systems, designers use computer-aided design (CAD) tools to guide the design flow. They exploit the ability of CAD tools to perform algebraic operations to compute/ predict circuit and system performance. This is possible because, in most electronic circuits and systems, linear operation can be assumed. The behavior of microwave components, circuits, and systems can, for example, be described in terms of "behavioral" parameters, such as Z-parameters, Y-parameters, and S-parameters. Transformation from one parameter to another is achieved by simple linear algebraic operations [1]. The performance of more complex circuits can be computed via linear matrix operations using the relevant parameters, i.e., Y-parameters for parallel connections and Z-parameters for series connections. More significantly, performance predictions can also be obtained via linear algebra transformations, i.e., the maximum gain, minimum noise figure, potential instability, etc., along with design insight, i.e., gain circles, noise circles, optimum input/output match requirements, and so on [1], [2]. Ministerio de Ciencia e Innovación | Ref. TEC2011-29264-C03-03 Ministerio de Ciencia e Innovación | Ref. TEC2011-28683-C02-02

A novel graphical power amplifier (PA) design tool, the “clipping contour,” is introduced and described. Using the now well-publicized continuous Class-B/J voltage waveform formulation as a starting point, a process is derived that allows contours to be constructed on a Smith chart that define the “zero-grazing” fundamental and harmonic impedance conditions. Theoretical equations are defined and solved whereby the contours can be drawn in real time in a computer-added design environment. A key and novel result from this theory is the definition of a 2-D harmonic design space that opens up rapidly as small concessions from optimum power and efficiency matching conditions are made. A design example is described and fabricated, which demonstrates the utility of using the second harmonic clipping contour during the PA design process. A 10-W GaN demonstrator gives measured continuous wave power > 8.5 W, efficiency > 60%, and better than -30-dB adjacent channel power ratio over a bandwidth of 1-2.9 GHz.

Recently, X -parameters have been introduced to model active device nonlinear behavior. In addition to providing a measurement-based tool to numerically predict nonlinear device behavior in computer-aided design, they can also provide the designer of nonlinear circuits an analytical design tool. Exploiting this design tool aspect, this work presents an application that combines the nonlinear vector network analyzer PNA-X and a passive tuner to extract a transistor load-independent X -parameter model, focused around targeted circuit impedances for optimal performance. Furthermore, an experimental search algorithm, based on X -parameters analytical computations and developed by Peláez-Pérez , has been used and experimentally validated in this paper, aimed to speed up the characterization and design process, minimizing the number of load-pull measurements necessary to provide an accurate transistor X -parameter model for use in analytical and/or numerical circuit design. Ministerio de Ciencia e Innovación | Ref. TEC2011-29264-C03-03

In this paper, an extended version of the continuous class-F-1 mode power amplifier (PA) design approach is presented. A new formulation describing the current waveform in terms of just two additional parameters, while maintaining a constant half-wave rectified sinusoidal voltage waveform, allows multiple solutions of fundamental and second-harmonic impedances that provide optimum performance to be computed. By varying only the imaginary parts of fundamental and second-harmonic impedances, it is shown that output performance in terms of power and efficiency is maintained constant and equal to that achievable from the standard class-F-1 . Indeed, when presenting resistive second-harmonic impedances, it will be demonstrated that the fundamental load can be adjusted to maintain satisfactory output performances greater than a certain predetermined target value. The measurements, conducted on a GaAs pHEMT device at 1 GHz, show a good agreement with the theoretical analysis, revealing drain efficiencies greater than 70% for a very large range of load solutions, which can translate to an ability to accommodate reactive impedance variations with frequency when designing broadband PAs.

Mathematical analysis of Doherty amplifiers have assumed many simplifications. Most notably, the peaking amplifier does not contribute power into the load and the peaking stage has an observed impedance of infinity. This paper will show that these simplifications impair the performance of a single-input Doherty amplifier and that phase tuning for compensation is needed to improve the overall system performance. The dual-input Doherty amplifier is capable of overcoming the limitations of power-dependent phase imbalance and phase compensation lines at the input of the peaking stage; however, the characterization of such an architecture is not straightforward. A new measurement technique is proposed to measure dc current, dc voltage, and output power levels to allow unique characterization of a dual-input Doherty amplifier. Phase compensation lines at the input of the peaking amplifier will be shown to be not required, as long as correct offset lines are calculated for both the carrier and peaking stage and that the λ/4 transmission-line length is not necessarily required for active load-pull. Results of a dual-input inverse load modulated Doherty amplifier are presented where the peaking stage delivers 10 dB less of maximum output power than the carrier, while still maintaining Doherty behavior. The peaking stage can therefore be implemented with a smaller device than the carrier.

This article presented a review of the most common load-pull approaches adopted in the measurement and characterization of large-periphery microwave transistor devices. Although the quarterwave transformer technique is simple and very cost-effective, it has serious limitations in terms of scalability, thereby necessitating a separate quarterwave transformer for each device and frequency. Furthermore, due to the limited bandwidth of the quarterwave transformer, its usage in harmonic load-pull applications is severely limited.

The extended continuous class-F mode RF power amplifier (PA) is presented for the first time. The introduction and experimental validation of this novel PA mode demonstrates a new design space over a wide band of frequencies. This paper will show that high output power and drain efficiency, equivalent to the class-F mode, can be maintained by varying the reactive components of fundamental and second harmonic impedances in accordance with the new formulation of the voltage waveform. Additionally it will be shown that, by varying both phase and magnitude of the fundamental and second harmonic impedances, a yet wider design space can be achieved, where the efficiency is maintained at a level greater than a certain target value. For the validation of this new theory, an experimental investigation was carried out on GaAs pseudomorphic HEMT devices and demonstrates that high output power and drain efficiency between 75%-83% can be achieved over a wide range of fundamental and second harmonic loads.

The paper presents the power amplifier design. The introduction of a practical harmonic balance capability at the device measurement stage brings a number of advantages and challenges. Breaking down this traditional barrier means that the test-bench engineer needs to become more aware of the design process and requirements. The inverse is also true, as the measurement specifications for a harmonically tuned amplifier are a bit more complex than just the measurement of load-pull contours. We hope that the new level of integration between both will also result in better exchanges between both sides and go beyond showing either very accurate, highly tuned device models, or using the device model as the traditional scapegoat for unsuccessful PA designs. A nonlinear model and its quality can now be diagnosed through direct comparison of simulated and measured wave forms. The quality of a PA design can be verified by placing the device within the measurement system, practical harmonic balance emulator into the same impedance state in which it will operate in the actual realized design.

After calibration, since the systematic imperfections of the envelop load-pull (ELP) components were now fully accounted for, the user is able to rapidly set accurate terminations with full Smith chart coverage. This functionality has been achieved by optimizing the hardware configuration of the envelop load-pull concept. Development of a system whose systematic errors could be described by a magnitude invariant error flow model was critical. As a consequence, a robust calibration mechanism, that is analogous to the one-port error correction of a vector network analyzer, was exploited and comprehensively verified. After calibration, since the systematic imperfections of the ELP components were now fully accounted for, the user is able to set accurately terminations with full Smith chart coverage. Finally, measurements on commercially available transistor devices are presented that verify the rapid nature, accuracy, flexibility, reliability, and ease of calibration of the multiharmonic load-pull system.

The design and implementation of a class-J mode RF power amplifier is described. The experimental results indicate the class-J mode's potential in achieving high efficiency across extensive bandwidth, while maintaining predistortable levels of linearity. A commercially available 10 W GaN (gallium nitride) high electron mobility transistor device was used in this investigation, together with a combination of high power waveform measurements, active harmonic load-pull and theoretical analysis of the class-J mode. Targeting a working bandwidth of 1.5-2.5 GHz an initial power amplifier (PA) design was based on basic class-J theory and computer-aided design simulation. This realized a 50% bandwidth with measured drain efficiency of 60%-70%. A second PA design iteration has realized near-rated output power of 39 dBm and improved efficiency beyond the original 2.5 GHz target, hence extending efficient PA operation across a bandwidth of 1.4-2.6 GHz, centered at 2 GHz. This second iteration made extensive use of active harmonic load-pull and waveform measurements, and incorporated a novel design methodology for achieving predistortable linearity. The class-J amplifier has been found to be more realizable than conventional class-AB modes, with a better compromise between power and efficiency tradeoffs over a substantial RF bandwidth.

RF I-V waveform measurement and engineering systems are now finally enabling practical waveform engineering to be directly undertaken with systems capable of supporting continuous wave stimulus reaching a high level of maturity. On-going research and development activities are presently addressing the multitone requirement. The availability of RF I-V measurement and engineering capability extends the characterization opportunities for both high-frequency/speed transistor technology developers and circuit/system designers; terminal waveforms are the unifying theoretical link between transistor technology, circuit design, and system performance. Design support can involve the direct utilization of such a measurement system in the design investigation/evaluation loop of either power transistor technology or PAs. This eliminates the black box design processes and allows for the development of new intelligent design processes that are completely founded on theoretical waveform analysis. Alternatively, it can also indirectly support the amplifier investigation/evaluation loop by supporting the development or improving the accuracy of nonlinear transistor models or by providing CAD-accessible behavioral or behavioral model parameter datasets. W can now only hope that, triggered by the availability of RF waveform measurement and engineering systems, we will see a renaissance in theoretical waveform mathematical analysis addressing not only power and efficiency but also design sensitivity and linearity.

This paper presents a comprehensive study on the effective utilization of large-signal measurement data in the nonlinear computer-aided design (CAD) process. To achieve this goal two distinctive, yet mutually complementary, approaches have been integrated. Measured nonlinear data was, in the first instance, directly integrated into a nonlinear CAD simulator, and in the second instance, utilized for a direct extraction of behavioral model parameters. The formulation of the developed model is based on the polyharmonic distortion approach. The combination of both the direct utilization of nonlinear data and the subsequent model generation into an integrated nonlinear design procedure offers rapid, yet reliable, deployment of the CAD-based design environment for complex large-signal simulations.

An active load pull waveform measurement system has been utilized to investigate, by drain current waveform analysis, the effect of short circuits at the second and higher harmonics on the gate of a 750 μm Gallium Arsenide transistor. It is confirmed that the half wave rectified sinusoidal current waveform necessary for modes of operation such as class B, J and F is not optimally generated at X-Band frequencies for transistors controlled purely by bias. The disrupting effect of the nonlinear device gate capacitance must be accounted for to take full advantage of these high efficiency modes. The addition of a simple wide band filter circuit at the input of a MMIC test cell to “short” the gate higher harmonics is shown to force the drain current waveform towards the ideal case and hence yield a significant increase in drain efficiency of up to 10 percent.

Push-pull power amplifiers (PAs) operating at HF through to GHz frequencies typically employ a transmission line balun structure. This letter demonstrates that their performance characteristics in high efficiency PA applications are critically different from conventional transformers. For the first time, the effect of the even-mode open-circuit termination on the output waveforms is measured. A novel mathematical formulation is proposed to describe the time-domain waveforms by defining the harmonic impedance environment in terms of odd and even mode excitation rather than tuned harmonics. Experimental verification using harmonic load-pull measurements showed good agreement with the theoretical waveforms generated from factorized waveform expressions.

A measurement system combining vector corrected waveform measurements with active harmonic load-pull extends, for the first time, real-time experimental waveform engineering up to the 30-W power level. The vector correction procedure is presented in this paper. A novel harmonic load-pull approach based on the real-time measurement capability of the system is demonstrated on a 4-W LDMOS device. A 20% increase in maximum output power to 4.7 W without degrading gain and efficiency is realized. Waveform analysis at various drive and load conditions directly identifies nonlinear capacitance effects being a key design issue for the design of highly efficient power amplifier.

A novel formulation for the voltage waveforms in high efficiency linear power amplifiers is described. This formulation demonstrates that a constant optimum efficiency and output power can be obtained over a continuum of solutions by utilizing appropriate harmonic reactive impedance terminations. A specific example is confirmed experimentally. This new formulation has some important implications for the possibility of realizing broadband >10% high efficiency linear RF power amplifiers.

This paper compares two popular high power, high efficiency modes of operation, class F and inverse class F, and assesses the peak obtainable drain efficiencies when using Si LDMOS devices in a limited bandwidth design. Optimum class F and inverse class F conditions are presented using active harmonic load-pull measurements, and it was found that a higher drain efficiency was achieved in the class F configuration. This result is due to the limitations imposed by the soft voltage breakdown occurring due to the extended voltage swings inherent to inverse class F, as a consequence generating unwanted current content during the off cycle. This significantly reduces the peak measured efficiency using Si LDMOS devices when implementing an inverse class F design with a drain bias of 28 V. By reducing the drain bias to 18 V, to accommodate the voltage extension of inverse class F, it became possible to achieve peak measured efficiencies much closer to what theory predicted.

A small signal S-parameter and noise model for the cascode MODFET has been validated up to 120 GHz, allowing predictable monolithic microwave integrated circuit (MMIC) design up to W-band. The potential of coplanar waveguide technology to build compact, high performance system modules is demonstrated by means of passive and active MMIC components. The realized passive structures comprise a Wilkinson combiner/divider and a capacitively loaded ultra miniature branch line coupler. For both building blocks, very good agreement between the measured and modeled data is achieved up to 120 GHz. Based on the accurate design database, two versions of compact integrated amplifiers utilizing cascode devices for application in the 90-120 GHz frequency range were designed and fabricated. The MMICs have 26.3 dB and 20 dB gain at 91 GHz and 110 GHz, respectively. A noise figure of 6.4 dB was measured at 110 GHz. The 90-100 GHz amplifier was integrated with an MMIC tunable oscillator resulting in a W-band source delivering more than 6 dBm output power from 94 to 98 GHz.

On-wafer measurements of the frequency-dependent impedance, modulation response, and RIN power spectra of ultra-high-speed p-doped In/sub 0.35/Ga/sub 0.65/As/GaAs MQW lasers are presented and analyzed. The experimental results are shown to be accurately modeled by an equivalent circuit which accounts for both the carrier transport/capture dynamics and the junction space-charge capacitance. We find that the carrier escape time out of the QW's in our laser structure is much larger. Than the carrier capture time, and therefore the interplay between carrier capture and re-emission is not affecting the high-speed modulation dynamics. On the other hand, the absolute values of both the carrier capture time and the space-charge capacitance still limit the modulation bandwidth. >

Utilizing small-signal direct modulation and relative intensity noise measurements, the authors investigate changes in the modulation response, the differential gain delta g/ delta n, the nonlinear gain coefficient in , and the damping factor K, which result from three structural modifications to GaAs-based multiple quantum well lasers: the addition of strain in the quantum wells; and increase in the number of quantum wells; and the addition of p-doping in the quantum wells. These modifications are assessed in terms of their potential for reducing the drive current required to achieve a given modulation bandwidth, for increasing the maximum intrinsic modulation bandwidth of the laser, and for improving the prospects for monolithic layer/transistor integration. It has been possible to simultaneously increase delta g/ delta n and decrease K, yielding very efficient high-speed modulation (20 GHz at a DC bias current of 50 mA) and the first semiconductor lasers to achieve a direct modulation bandwidth of 30 GHz under DC bias. >

Low-frequency, baseband effects in Power Amplifiers can become particularly important when steps are taken to improve operational efficiency through the application of `envelope' based approaches such as Envelope Elimination and Restoration (EER) and Envelope Tracking (ET). The aim of this paper is to demonstrate how a broadband modulated time-domain measurement system, when used in combination with active IF load-pull, can be employed to gain valuable insight into the behaviour of high-frequency power transistors whilst operating under modulated conditions. Also considered is the interesting idea of how PA linearity can be improved using the very mechanisms that are employed to improve efficiency. Low-frequency, baseband effects in Power Amplifiers can become particularly important when steps are taken to improve operational efficiency through the application of `envelope' based approaches such as Envelope Elimination and Restoration (EER) and Envelope Tracking (ET). The aim of this paper is to demonstrate how a broadband modulated time-domain measurement system, when used in combination with active IF load-pull, can be employed to gain valuable insight into the behaviour of high-frequency power transistors whilst operating under modulated conditions. Also considered is the interesting idea of how PA linearity can be improved using the very mechanisms that are employed to improve efficiency.

An accurate database for active and passive MMIC components valid up to millimeter-wave frequencies has been established. The CAE models for the transistors and the passive CPW-components; which include the coplanar T-junction, are derived from on-wafer S-parameter measurements up to 63 GHz. For noise modeling of the MODFETs up to millimeter-wave frequencies, an approach based on the temperature noise model reported by M.W. Pospiezalski (1989) has been used. The parameter T/sub d/, which is required for the temperature model, is extracted from on-wafer noise parameter measurements up to 18 GHz. Using this database, the authors have designed and fabricated low-noise V-band two-stage amplifiers, using pseudomorphic MODFETs on a GaAs substrate, which have a performance of 10.5-dB gain and 5.2-dB noise figure at 58.5 GHz. Very good agreement between simulated and measured MMIC gain and noise performance is achieved up to V-band. >

A high voltage-gain GaAs vertical field-effect transistor (VFET) with an InGaAs-GaAs pseudomorphic planar-doped barrier (PDB) launcher is described. The pseudomorphic structure, which includes a small amount of indium in the launcher, was grown by molecular beam epitaxy (MBE). Fabricated transistors, with good pinch-off characteristics (gate threshold voltage of -1.6 V), have exhibited DC open-drain voltage gains of up to 50 at 77 K. This high voltage gain results from the combination of high transconductances and low output conductances. The former are attributed to velocity enhancement by hot-electron injection, and the latter are attributed to the suppression of electron spillover by energy band discontinuity at the heterointerface between the launcher and the channel. >

GaAs-AlGaAs and strained layer In/sub 0.3/Ga/sub 0.7/As-GaAs-AlGaAs GRINSCH SQW lasers grown by molecular beam epitaxy are discussed. The strained-layers have threshold currents of 12 mA for 30- mu m*400- mu m devices (1000 A/cm/sup 2/) and threshold current densities of 167 A/cm/sup 2/ for 150- mu m*800- mu m devices. The threshold currents of strained-layer InGaAs lasers are lower than those of GaAs for all dimensions tested with 20- mu m-wide GaAs devices exhibiting threshold currents three times those of In/sub 0.3/Ga/sub 0.7/As devices. Microwave modulation of 10- mu m*500- mu m strained-layer lasers with simple mesa structures yields bandwidths of 6 GHz. For all dimensions tested, strained-layer InGaAs devices have greater bandwidths than GaAs devices. These measurements confirm theoretical predictions of the effects of valence band modification due to biaxially compressive strain. >

Summary form only given. The authors have developed GaAs/AlGaAs multiple-quantum-well (MQW) lasers with direct modulation bandwidths of 16 GHz. The devices utilize a compact vertical layer structure which also makes them particularly suitable for integration. The theoretical calculations leading to this optimized design as well as the DC and high-frequency characteristics of the lasers are discussed. A 3-dB electrical modulation bandwidth of 16 GHz was achieved at 90-mA pulsed bias in a 4- mu m*200- mu m device. The slope of the plot of the resonance frequency versus the square root of the optical power yielded values of dg/dn ranging between 4*10/sup -16/ and 7*10/sup -16/ cm/sup 2/ for short-cavity-length and narrow-mesa-width lasers. >

S-parameters of MODFETs were measured versus bias instead of frequency with a special feature of the HP8510 network analyzer. Figure of merit plots, f/sub T/, and f/sub max/, were quickly generated from the bias sweeps of S-parameters, and optimum bias points were easily found. The intrinsic device elements of MODFETs were calculated after de-embedding the measurements from the device parasitics. The technique is demonstrated with a 0.15- mu m pseudomorphic MODFET with an f/sub T/ of 150 GHz. The usefulness of the technique for understanding the operation of the MODFETs is discussed. With this technique a bias scan of an intrinsic element value can be measured and plotted in 13 s. >

The authors report a detailed characterization of ultrahigh-speed pseudomorphic AlGaAs/InGaAs (on GaAs) modulation-doped field-effect transistors (MODFETs) with emphasis on the device switching characteristics. The nominal 0.1- mu m gate-length device exhibit a current gain cutoff frequency (f/sub t/) as high as 152 GHz. This value of f/sub t/ corresponds to a total delay of approximately 1.0 ps and is attributed to the optimization of layer structure, device layout, and fabrication process. It is shown that the electron transit time in these very short gate-length devices still accounts for approximately 60% of the total delay, and, as a result, significant improvements in switching speed are possible with further reductions of gate length. The results reported clearly demonstrate the potential of the pseudomorphic AlGaAs/InGaAs MODFET as an ultrahigh-speed device. Its excellent switching characteristics are attributed to the high saturation velocity ( approximately 2*10/sup 7/ cm/s), 2DEG sheet density (2.5*10/sup 12/ cm/sup -2/), and current drive capability (>200 mA/mm at the peak transconductance). >

Double heterojunction AIGaAs/InGaAs/GaAs modulation-doped field effect transistors (MODFET's) using lattice-strained AIGaAs/InGaAs/GaAs layer structure have been fabricated and evaluated at microwave frequencies for various bias conditions. MODFET's with a 1-µm gate length show a room-temperature peak extrinsic dc transconductance (g/sub m/) of 400 mS/mm with a full channel current of 610 mA/mm. For 0.3-µm-gate MODFET's an extrinsic dc g/sub m/ of 505 mS/mm and a full channel current of 720 mA\mm were obtained. Devices having a 1-µm gate length show a maximum available gain cutoff frequency (f/sub max/) of 85 GHz and a current-gain cutoff frequency (f/sub T/) of 22 GHz from S-parameter measurements. The 0.3-µm devices show an f/sub T/ of 45 GHz and an f/sub max/ of 120 GHz. Bias-dependent equivalent circuit models are also discussed.

An experimental study in which the quantum well width (W) is varied from 45 to 200 AA is discussed. Optimum device performance was observed at a well width of 120 AA. The 0.2- mu m*130- mu m devices with 120-AA quantum-well width typically exhibit a maximum channel current density of 550 mA/mm, peak transconductance of 550 mS/mm, and peak current gain cutoff frequency (f/sub T/) of 122 GHz. These results have been further improved in subsequent fabrications employing a trilevel-resist mushroom-gate process. The 0.2- mu m*50- mu m devices with mushroom gate exhibit a peak transconductance of 640 mS/mm, peak f/sub T/ of 100 GHz, and best power gains cutoff frequency in excess of 200 GHz. These results are among the best ever reported for GaAs-based FETs and are attributed to the high two-dimensional electron gas (2DEG) sheet density, good low-field mobility, low ohmic contact, and the optimized mushroom gate process. >

The authors describe a study of charge control in conjunction with DC and RF performance of 0.35- mu m-gate-length pseudomorphic AlGaAs/InGaAs MODFETs. Using C-V measurements, they estimate that a two-dimensional electron gas (2DEG) with density as high as 1.0*10/sup 12/ cm/sup -2/ can be accumulated in the InGaAs channel at 77 K before the gate begins to modulate parasitic charges in the AlGaAs. This improvement in charge control of about 10-30% over a typical AlGaAs/GaAs MODFET may partially be responsible for the superior DC and RF performance of the AlGaAs/InGaAs MODFET. At room temperature, the devices give a maximum DC voltage gain g/sub m//g/sub d/ of 32 and a current gain cutoff frequency f/sub T/ of 46 GHz. These results are state of the art for MODFETs of similar gate length. >

A model is presented that clarifies the role of inefficient charge modulation in limiting the current-gain cutoff frequency (f/sub T/) of conventional GaAs/AlGaAs and pseudomorphic InGaAs/AlGaAs MODFETs. Both modulation of parasitic charge in the electron-supplying layer and departure from the saturated velocity mode of operation are seen to reduce the efficiency with which the gate controls the drain current. Consequently, f/sub T/ and the apparent electron velocity are reduced by a factor called the modulating efficiency. Using this model, the superior performance of the pseudomorphic MODFET is explained by its ability to achieve higher sheet densities before modulating parasitic charge in the AlGaAs layer. These results indicate that efficient modulation of the current-producing charge is as important as a high electron velocity. >

Self-aligned AlGaAs/GAs heterojunction bipolar transistors with peak specific transconductances as high as 25 mS/ mu m/sup 2/ of emitter area are discussed. These are the highest specific transconductances ever reported for a bipolar transistor. These devices, which contain no indium in the emitter, display specific parasitic emitter resistances of less than 1*10/sup -7/ Omega -cm/sup 2/. This low parasitic resistance is attributed to an improved n-type contact technology, in which a molybdenum diffusion barrier and a plasma-enhanced chemical vapor deposition SiO/sub 2/ overlayer are used to achieve low specific contact resistivities. >

The usual approximate expression for measured f/sub T/=(g/sub m//2 pi (C/sub gs/+C/sub gd/)) is inadequate. At low drain voltages just beyond the knee of the DC I-V curves, where intrinsic f/sub t/ is a maximum for millimeter-wave MODFETs, the high values of C/sub gd/ and G/sub ds/ combine with the high g/sub m/ to make terms involving the source and drain resistance significant. It is shown that these resistances can degrade the measured f/sub T/ of a 0.30- mu m GaAs-AlGaAs MODFET from an intrinsic maximum f/sub T/ value of 73 GHz to a measured maximum value of 59 GHz. The correct extraction of maximum f/sub T/ is essential for determining electron velocity and optimizing low-noise performance. >

The authors report the DC and RF performance of nominally 0.2- mu m-gate length atomic-planar doped pseudomorphic Al/sub 0.3/Ga/sub 0.7/As/In/sub 0.25/Ga/sub 0.75/As modulation-doped field-effect transistors (MODFETs) with f/sub T/ over 120 GHz. The devices exhibit a maximum two-dimensional electron gas (2 DEG) sheet density of 2.4*10/sup 12/ cm/sup -2/, peak transconductance g/sub m/ of 530-570 mS/mm. maximum current density of 500-550 mA/mm, and peak current-gain cutoff frequency f/sub T/ of 110-122 GHz. These results are claimed to be among the best ever reported for pseudomorphic AlGaAs/InGaAs MODFETs and are attributed to the high 2 DEG sheet density, rather than an enhanced saturation velocity, in the In/sub 0.25/Ga/sub 0.75/As channel. >

The authors report the influence of the kink effect on the DC and microwave performance of i-InAlAs heterojunction doped-channel MESFETs lattice matched to an InP substrate with submicrometer gates. Kink effects were observed at room temperature as well as at 77 K in the DC measurement. The kinks seem to be related to deep-level electron trapping, and are not present at microwave frequencies. Measured results are presented showing that the existence of kinks at low operating frequencies does not seem to degrade the microwave performance of the devices. >

Summary form only given. The authors report improved DC performance in a vertical field effect transistor (VFET) by inserting a pseudomorphic n/sup +/-In/sub x/Ga/sub 1-x/As (x=0.07) layer between a planar doped barrier (PDB) launcher and an n-channel layer instead of an n/sup +/-GaAs layer. In this structure, higher-energy hot electrons can be injected into the channel and the spillover of electrons from the n/sup +/-layer to the n-channel can be reduced because of the resulting conduction band discontinuity. A transconductance (maximum g/sub m/=400 mS/mm), average electron velocity ( nu /sub av/=3.86*10/sup 7/ cm/s), and voltage gain (g/sub m//g/sub d/=50) that represent a significant improvement over previous results for VFETs have been obtained. >

A multilevel resist process has been developed that is capable of producing 0.1- mu m T-cross-section gates using 50-kV electron-beam lithography. A ratio of upper to lower dimensions greater than three provides a low gate resistance of 450 Omega -mm, allowing improved microwave performance over high-resistance trapezoidal gates. Careful characterization and control of gate recessing resulted in less than 300 AA of ungated channel recess for minimal parasitic channel resistance. Several material structures were compared, varying the dopant incorporation from 80-AA spike doping to 40-AA spike doping to atomic planar doping. The growth of the spike-doped structures was optimized to provide a high n/sub s/>or=1.2 10/sup 12/ cm/sup -2/. In addition, these spike-doped structures had heavily doped caps of 100 Omega / Square Operator sheet resistivity to provide low parasitic source resistance. Performance was evaluated by on-wafer S-parameter measurements. The peak measured unity current gain cutoff frequency ranged from 90 to 113 GHz, depending on the material structure. This performance is attributed to careful attention to the details of gate formation, layer design, and MBE (molecular-beam epitaxial) growth. >

An experimental study of the influence of quantum well width on DC and RF device performance in nominally 0.2- mu m gate-length atomic-planar doped pseudomorphic Al/sub 0.30/Ga/sub 0.70/As/In/sub 0.25/Ga/sub 0.75/As MODFETs is reported. Three important results have been obtained: (1) a well width of approximately 120 AA appears to be optimum for overall device performance and gives a current gain cutoff frequency (f/sub T/) of 122 GHz; (2) thinner quantum wells ( approximately 45 AA) result in a significant reduction ( approximately 40%) in maximum channel current density; and (3) thicker quantum wells (150-200 AA), which exceed the critical thickness (90-100 AA) predicted by the Matthews and Blakeslee model, still give excellent device performance (f/sub T/=107 GHz). As a result of the latter, it might be possible to realize much higher-indium-percentage (30-40%) quantum wells without having to reduce the well width to an unacceptable value. >

Strained-layer Ga/sub 0.7/In/sub 0.3/As-AlGaAs-GaAs graded-index separate-confinement heterostructure single-quantum-well lasers were grown by molecular-beam epitaxy with growth conditions selected to optimize the growth of each material. The lasers emit at a wavelength of 1.03 mu m at 300 K, have threshold currents of 12 mA for 3 mu m*400 mu m devices, and have average threshold current densities of 174 A/cm/sup 2/ for 40 mu m*800 mu m devices. Studies of threshold current versus cavity length and width agree with theoretical formulations. The threshold currents for lasers of various lengths and widths are significantly lower than those for previous strained-layer lasers grown by molecular-beam epitaxy and lower than those for strained-layer lasers grown by organometallic vapor-phase epitaxy. Although these devices have not been optimized for microwave modulation, 4-GHz bandwidths have been measured for 21.5 mu m*600 mu m devices. >