27 results on '"Tsui, Bing-Yue"'
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2. Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation
3. Modeling and Characterization of the Narrow-Width Effect of 4H-SiC MOSFETs With Local Oxidation of SiC Isolation
4. A Study on the Isolation Ability of LOCal Oxidation of SiC (LOCOSiC) for 4H-SiC CMOS Process
5. 1100 V, 22.9 mΩcm2 4H-SiC RESURF Lateral Double-Implanted MOSFET With Trench Isolation
6. Demonstration of CMOS Integration With High-Voltage Double-Implanted MOS in 4H-SiC
7. Digital Logic and Asynchronous Datapath With Heterogeneous TFET-MOSFET Structure for Ultralow-Energy Electronics
8. Degradation Mechanism of Ge N+-P Shallow Junction With Thin GeSn Surface Layer
9. Effect of Ion-Implantation Temperature on Contact Resistance of Metal/n-Type 4H-SiC With Ar Plasma Treatment
10. Effects of Rapid Thermal Annealing on Ar Inductively Coupled Plasma-Treated n-Type 4H-SiC Schottky and Ohmic Contacts
11. Reduction of Specific Contact Resistance on n-Type Implanted 4H-SiC Through Argon Inductively Coupled Plasma Treatment and Post-Metal Deposition Annealing
12. Reduced Junction Leakage by Hot Phosphorus Ion Implantation of NiGe-Contacted Germanium n+/p Shallow Junction
13. Characterization of LOCOS Field Oxide on 4H-SiC Formed by Ar Preamorphization Ion Implantation
14. Investigation Into Gate-to-Source Capacitance Induced by Highly Efficient Band-to-Band Tunneling in p-Channel Ge Epitaxial Tunnel Layer Tunnel FET
15. Experimental Demonstration of p-Channel Germanium Epitaxial Tunnel Layer (ETL) Tunnel FET With High Tunneling Current and High ON/OFF Ratio
16. Ultra-High Bit Density 3D NAND Flash-Featuring-Assisted Gate Operation
17. A Novel Approach Using Discrete Grain-Boundary Traps to Study the Variability of 3-D Vertical-Gate NAND Flash Memory Cells
18. Impact of${\hbox{V}}_{\rm pass} $ Interference on Charge-Trapping NAND Flash Memory Devices
19. Modeling the Impact of Random Grain Boundary Traps on the Electrical Behavior of Vertical Gate 3-D NAND Flash Memory Devices
20. Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant Segregation
21. ${\rm Si}_{\rm x}{\rm Ge}_{1\hbox{-}{\rm x}}$ Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement
22. Observation of Extreme-Ultraviolet-Irradiation-Induced Damages on High-Dielectric-Constant Dielectrics
23. Effects of EUV Irradiation on Poly-Si SONOS NVM Devices
24. High-Performance Poly-Si Nanowire Thin-Film Transistors Using the $\hbox{HfO}_{2}$ Gate Dielectric
25. Method for Extracting Gate-Voltage-Dependent Source Injection Resistance of Modified Schottky Barrier (MSB) MOSFETs
26. Process and Characteristics of Fully Silicided Source/Drain (FSD) Thin-Film Transistors
27. Tilt angle effect on DC and AC performance of Halo PMOS
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