1. A Novel Low Computational Burden Dual-Observer Phase-Locked Loop with Strong Disturbance Rejection Capability for More Electric Aircraft
- Author
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S. A. Odhano, Pericle Zanchetta, Sabino Pipolo, Andrea Formentini, Mi Tang, and Stefano Bifaretti
- Subjects
Settore ING-IND/32 ,Observer (quantum physics) ,Computer science ,phase-locked loops ,more electric aircraft ,Synchronizing ,Grid ,Electrical grid ,Industrial and Manufacturing Engineering ,Power (physics) ,Phase-locked loop ,Control and Systems Engineering ,Control theory ,Fault tolerant control ,Harmonics ,Frequency grid ,Electrical and Electronic Engineering ,power system harmonics ,repetitive control - Abstract
In the past two decades, much research and industry effort has been dedicated to transportation electrification. In particular, aerospace industry, with the more electric aircraft (MEA) revolution, is shifting toward the usage of electrical in place of mechanical energy on board to save fossil fuel and reduce polluting emissions. For this reason, phase-locked loops (PLLs) systems have been well developed for synchronizing different power sources and loads within the aircraft electrical grid. Since one of the proposed solutions for MEA power grids is to operate at variable frequency from 360 to 800 Hz, a third-order model-based steady-state linear Kalman filter PLL (SSLKF-PLL) has been proposed in the literature to achieve fast tracking performance during such grid frequency variations. To suppress the potential disturbances due to harmonics in the grid, sensor scaling errors/unbalances, and dc offsets while maintaining low computational burden, this article aims to enhance the disturbance rejection ability of SSLKF-PLL by adding a repetitive observer (RO). Simulation and experimental tests show that RO allows stable and effective suppression of disturbances from all the abovementioned sources during variable frequency operation. The execution time of the proposed PLL is only 4.23 μ s using a Xilinx Zynq-7000-based platform, where the added RO takes 2.664 μ s to execute, and the SSLKF-PLL alone takes 1.566 μ s.
- Published
- 2021