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The quantitative evaluation of bearing damage size is of great significance for accurately predicting the remaining useful life of bearing. Existing studies have shown that rolling elements will produce corresponding vibration features when they enter and leave localized defects, and these features are the premise of accurately estimating the defect size. This paper presents an accurate quantitative estimation method of bearing localized defect size based on vibration instantaneous energy analysis. The time interval of rolling element entry and exit the damaged area is determined by analysing the instantaneous energy of fault impulse. The effectiveness of the proposed method is verified by the experiments of different defect sizes of the outer race and inner race at various speeds. Besides, the proposed method has higher accuracy compared with the conventional methods, which provides a new idea for fast and convenient estimation of the ball bearing localized defect size.

Nociceptors are an indispensable part of the human nervous system that can sense potential dangers from external environmental stimuli. The biomimetic studies of artificial nociceptors have inspired advanced technology in neuromorphic computing, humanoid robots and artificial visual sensors. In this work, we demonstrate an artificial optoelectronic nociceptor using the memristor of large-area In2S3 thin films. The nociceptor responds not only to electrical stimuli but also illumination of visual light, showing complete nociceptive behaviors of ‘threshold’, ‘inadaptation’, ‘relaxation’ and ‘sensitization’. The features of the sensory signal such as responding threshold, relaxation time and sensitivity can be tuned in controllable manner, by the strength and frequency of the external stimuli as well as the biasing of electrostatic gate. Such realization of sensory response to multiple external stimuli in the artificial perceptron demonstrates the feasibility of constructing advanced electronic receptor and artificial human eye.

In this work, investigation on the degradation behavior of 1.2 kV/52 A silicon carbide (SiC) power MOSFETs subjected to repetitive slow power cycling stress has been performed. Electric characteristics have been characterized periodically over the stress and the respective degradation mechanisms have also been analyzed. A comprehensive degradation analysis is further conducted after the aging test by virtue of the x-ray inspection system, scanning acoustic microscope, scanning electron microscope, emission microscope, etc. Experimental results reveal that both the degradation of the gate oxide on the chip-level and the degradation of the bond wire and solder layer on the package-level have emerged over the cyclic stress. Specifically, growths of threshold voltage (V th) and gate leakage current (I gss) are thought to be relevant with the degradation of gate oxide by SiC/SiO2 interface states trapping/de-trapping electrons on the chip-level, while the appearance of fatigue in the bond wire and the delamination of the solder layer imply the degradation on the package-level. This work may provide some practical guidelines for assessments of the reliability of SiC power MOSFETs in power conversion systems.

Stress voltages on time-dependent breakdown characteristics of GaN MIS-HEMTs during negative gate bias stress (with V GS < 0, V D = V S = 0) and off-state stress (V G < V Th, V DS > 0, V S = 0) are investigated. For negative bias stress, the breakdown time distribution (β) decreases with the increasing negative gate voltage, while β is larger for higher drain voltage at off-state stress. Two humps in the time-dependent gate leakage occurred under both breakdown conditions, which can be ascribed to the dielectric breakdown triggered earlier and followed by the GaN layer breakdown. Combining the electric distribution from simulation and long-term monitoring of electric parameter, the peak electric fields under the gate edges at source and drain sides are confirmed as the main formation locations for per-location paths during negative gate voltage stress and off-state stress, respectively.

In view of the high reliability requirements of fluid material tanks and the difficulty of quality inspection, FLUENT is used to construct the tank model as a set of physics variable values on a finite number of discrete points. The original continuous physical field (pressure field and velocity field, etc.) of the fluid in the time system and the space system is replaced by certain laws and principles. At the same time, an algebraic equations are established for the relationship between these finite number of discrete points, and then the basic method of finite element method is used to solve the algebraic equations, and then the relative approximation of the stress acting on the tank in the time and space systems is obtained. After a continuous accelerated simulation, the weak link of the tank is finally determined.

To solve the correlation problem in evidence theory, this paper proposes an evidence theory model based on Copula function and related reliability assessment methods. First, we establish a performance degradation model based on the Wiener process and calculate the PDF of the lifetime distribution. Secondly, the fuzzy C-means algorithm is used to discretize the probability density function and obtain the marginal basic reliability allocation (BPA). Finally, the fusion of multidimensional evidence variables is carried out using the improved synthesis rules based on Copula function. The example analysis shows that this method solves the evidence-related problems in traditional evidence theory, and it is more efficient than other methods in the literature.

The influence of different C-doping locations in a GaN/Si structure with a GaN/AlN superlattice (SL) buffer on the material and electrical properties of GaN/Si was studied. The introduction of C doping can remarkably degrade the crystal quality of the buffer. C-doping of a top GaN buffer can introduce compressive stress into the top GaN due to the size effect, while C-doping in a SL buffer can impair the compressive stress provided from the SL buffer to the top GaN. It is found that introducing high-density carbon into the whole buffer can result in a more strain-balanced GaN/Si system with small deterioration of the 2DEG channel. Furthermore, the whole buffer C-doping method is an effective and easy way to achieve a thin buffer with low leakage current and high breakdown voltage (266 V@1 nA mm−1; 698 V@10 μA mm−1; 912 V@1 mA mm−1). By using the whole-buffer C-doping method, a 2.5 μm-thick AlGaN/GaN HFET with a breakdown voltage higher than 900 V was achieved, and the breakdown voltage per unit buffer thickness can reach 181 V μm−1.

The influences of dry-etching damage on the electrical properties of an AlGaN/GaN Schottky barrier diode with ICP-recessed anode was investigated for the first time. It was found that the turn-on voltage is decreased with the increase of dry-etching power. Furthermore, the leakage currents in the reverse bias region above pinch-off voltage rise as radio frequency (RF) power increases, while below pinch-off voltage, leakage currents tend to be independent of RF power. Based on detailed current–voltage–temperature (I–V–T) measurements, the barrier height of thermionic-field emission (TFE) from GaN is lowered as RF power increases, which results in early conduction. The increase of leakage current can be explained by Frenkel–Poole (FP) emission that higher dry-etching damage in the sidewall leads to the higher tunneling current, while below pinch-off voltage, the leakage is only related to the AlGaN surface, which is independent of RF power.

We report a novel structure of AlGaN/GaN heterostructure field effect transistors (HFETs) with a Si and Mg pair-doped interlayer grown on Si substrate. By optimizing the doping concentrations of the pair-doped interlayers, the mobility of 2DEG increases by twice for the conventional structure under 5 K due to the improved crystalline quality of the conduction channel. The proposed HFET shows a four orders lower off-state leakage current, resulting in a much higher on/off ratio (~ 109). Further temperature-dependent performance of Schottky diodes revealed that the inhibition of shallow surface traps in proposed HFETs should be the main reason for the suppression of leakage current.

Both the forward and reverse-bias current transport mechanisms of an AlGaN/GaN Schottky barrier diode with a fully recessed Schottky anode (recessed-SBD) are investigated for the first time. A two-dimensional (2D) device simulation gives insight into the electronic transport. The difference between the forward and reverse conduction paths enables the reduction in Von without sacrificing the low reverse leakage current properties. The results of temperature-dependent current–voltage (T–I–V) measurements show that thermionic field emission (TFE) is the dominant current transport mechanism for forward bias. In the reverse-bias region above the pinch-off voltage, two mechanisms codetermine leakage currents, which contain Frenkel–Poole emission from the overlapped planar contact and tunneling from the recessed sidewall contact. Below the pinch-off voltage, the leakage currents are observed to have exponential temperature dependence, which may be consistent with trap-assisted tunneling (TAT).

In this letter, a normally-off GaN recessed-gate MOSFET is demonstrated using a nonplasma gate recess technique, in which the access region with AlGaN/GaN heterostructure was selectively grown on a semi-insulating GaN/Si template to naturally form a recessed gate. The normally-off recessed-gate Al2O3/GaN MOSFET presents a high threshold voltage of 3.5 V and a maximum drain current density of 550 mA/mm (at a positive gate bias of 12 V). A maximum field-effect mobility of 170 cm2 V−1 s−1 and a large on/off current ratio of more than 107 was obtained, which indicates the high quality of the Al2O3/GaN interface.

In this work, the leakage current properties of semi-insulating GaN (SI-GaN) grown on Si(1 1 1) substrate with a low-temperature (LT) AlN interlayer were studied. Two terminal lateral current–voltage measurements revealed an early conduction phenomenon via buffer layers with an LT-AlN interlayer, in which both p- and n-type conduction phenomena were observed from Hall-effect measurement during temperature changing. It is suggested that the p-type conduction existed in the Si substrate due to the diffusion of Al atoms into the Si substrate during the epitaxial growth. The origin of n-type conduction was two-dimensional electron gas (2DEG) in the LT-AlN/GaN interface, which acted as a conduction channel in SI-GaN. Furthermore, the vertical leakage current measurement and the space charge limited current model were used to analyse the impact of the 2DEG conduction channel on the leakage current properties. It is revealed that leakage current properties are very sensitive to the thickness of the GaN layer above the LT-AlN interlayer (Top-GaN). Increasing the thickness of Top-GaN becomes an effective way to suppress leakage current. Therefore, both strain engineering and leakage current properties are essential factors to be considered in the selection of strain compensation interlayer in the growth of SI-GaN on Si substrate for power switching applications.

The electrical properties of the structure of GaN grown on an Si (111) substrate with low-temperature (LT) AlN interlayers by metal—organic chemical-vapour deposition are investigated. An abnormal P-type conduction is observed in our GaN-on-Si structure by Hall effect measurement, which is mainly due to the Al atom diffusing into the Si substrate and acting as an acceptor dopant. Meanwhile, a constant n-type conduction channel is observed in LT-AlN, which causes a conduction-type conversion at low temperature (50 K) and may further influence the electrical behavior of this structure.

A medium-temperature/high-temperature (MT/HT) bilayer AlN buffer was introduced for GaN grown on Si(111) by metal organic chemical vapor deposition. The properties of the GaN films with a MT/HT bilayer AlN buffer and those with a single-layer HT-AlN buffer were compared and the influence of the growth temperature of the MT-AlN layer was investigated. With a MT-AlN layer grown in the temperature range from 800 to 1000 °C, the crystalline qualities of the subsequent HT-AlN layer and the GaN film were improved. According to the X-ray diffraction results and the transmission electron microscopy images, the dislocation density in GaN film was reduced with a MT/HT bilayer AlN buffer as compared to those with a single-layer HT-AlN buffer. Moreover, photoluminescence and Raman spectra exhibit enhanced optical properties and less tensile stresses of the GaN film. Better surface morphology of GaN was also obtained with a MT/HT bilayer AlN buffer.

In this report, two types of normally-off AlGaN/GaN heterostructure field effect transistors (HFETs) with recessed-gate structure have been fabricated by using common technique of induced coupled plasma (ICP) dry etching and a novel technique of selective area growth (SAG), respectively. The devices fabricated by SAG (SAG-HFET) showed better performance than that of ICP-HFETs with larger maximum drain current of 300 mA/mm, positive threshold voltage of 0.4 V, and lower pinch off channel leakage current (2.17×10-3 mA/mm). The analysis indicates that such obvious difference originated from the different AlGaN quality of the gate region under the Schottky contact, in which the damage to the gate region stemmed from dry etching can be avoided by the SAG technique so that the forming of higher quality Schottky contact can be guaranteed. These results indicate that SAG technique is a promising method for fabricating the normally-off GaN based HFETs.

In the paper, a fast coalescence growth is introduced to the epitaxial growth of GaN on silicon substrate. With the fast coalescence growth method, a thin low pressure GaN (LP-GaN) layer used as a function layer, the GaN film could coalesce quickly within a thin thickness, additionally, a smooth surface and high crystal quality could be achieved. With further investigation, it was found that the general GaN coalescence thickness was mainly influenced by the thickness and the growth pressure of the LP-GaN interlayer. And the LP-GaN interlayer has a critical thickness, if over the critical thickness, the crystal quality would degrade. At the same time, it is found that the GaN quality was not affected by the coalescence thickness with a thin LP-GaN interlayer under critical thickness.

In this work, the influence of the V/III ratios of the low temperature (LT) AlN interlayer on GaN grown on Si substrate have been investigated. It was found that V/III ratio of LT-AlN interlayer is another important growth parameter, which the crystalline quality of GaN was strongly dependent on. By optimizing the V/III ratio of LT-AlN, the high quality crack-free GaN epilayer with lower dislocation density on Si substrate have been obtained. We attribute it to the different LT-AlN surface morphology originated from optimizing the V/III ratio. Different V/III ratios could result in different GaN growth rates in vertical and lateral direction, which could effectively prevent the threading dislocation from penetrating through the LT-AlN interlayer.