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Electric vehicles (EVs) are experiencing explosive growth in public adoption, causing a major shift in research and development priorities by OEMs toward electrified powertrains. To verify EV drivetrain platforms and software models in the design phase, testbeds with specific capabilities are essential. Full-scale vehicle testbeds are expensive, bulky, dissipative, and not easily reconfigurable or movable, making scaled testbeds more attractive, especially for education and research institutes. To support this cause, this paper reports on the development of a small-scale, modular, hardware-in-the-loop (HIL) testbed platform for the drivetrain of EVs that is cost-effective, efficient, and easily movable and reconfigurable and allows integration of a battery pack. The testbed is comprised of two directly coupled electric machines. The first machine emulates the traction motor and is used to control vehicle speed according to a specified drive cycle. The second machine is used to impose a torque profile on the first machine's shaft—based on the vehicle's parameters and driving environment—and emulates a gearbox (if necessary). A systematic two-way scaling approach is adopted to downscale the parameters and driving environment of full-size EVs to a level that can be handled by the testbed and to upscale the test results obtained from the testbed to the full-size vehicle level. The power consumption of the testbed is limited to system losses. A case study involving a full-size EV was performed and the HIL simulation results were compared to the computer simulation results to verify the performance of the testbed. [ABSTRACT FROM AUTHOR]

In the event of a DC side fault in modular multilevel converters (MMCs), the fault current contributions are initially made by submodule (SM) capacitor discharge, which occurs before the fault is detected, followed by the AC side contribution to the DC side fault. While the AC side currents can be regulated using fault blocking SMs, the initial discharge of the SM capacitors results in high DC fault currents, which can take several milliseconds to be brought under control. This paper presents a method to actively control the rate of rise of the DC fault current by regulating the discharge of SM capacitors and accelerating the suppression of fault current oscillations during fault ride-through (FRT) in a full-bridge (FB)-MMC system. In the proposed method, the discharge direction of the FBSM capacitors is reversed following the detection of a DC side fault, which leads to a reversal in the fault current direction and a fast drop-off towards the zero-crossing. Immediately after the zero-crossing of the DC fault current, the DC fault is cleared by adjusting the arm voltage references and operating the MMC as a static synchronous compensator (STATCOM) to provide voltage support to the AC grid. The proposed control scheme provides faster fault current suppression, more effective SM capacitor voltage regulation, low AC side and MMC arm current transient peaks, and an overall superior DC-FRT performance compared to methods in which the conventional fault ride-through operation is initiated immediately upon DC fault detection. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) based on half-bridge submodules (HBSMs) are unable to prevent the AC side contribution to DC side fault currents, thus necessitating circuit breakers (CBs) for protection. A solution to this problem is using submodules (SMs) that are capable of blocking the flow of current from the AC grid to feed the DC side fault. The full-bridge submodule (FBSM) is one type of fault blocking SM where the presence of two extra switches ensures that in the event of a DC fault, the reverse voltage from the FBSM capacitor is placed in the path of the AC side current feeding the DC side fault through the antiparallel diodes. However, the additional semiconductor switches in the FBSMs increase the converter cost, complexity, and losses. Several SM configurations have been proposed in recent years that provide DC fault blocking capability with lower losses and device counts than those of FBSMs. Besides, many of the proposed hybrid converter configurations that combine different topologies to optimize converter performance are also capable of providing DC fault blocking. Furthermore, certain SM topologies are capable of riding through DC faults by remaining deblocked and operating in static synchronous compensator (STATCOM) mode to provide reactive power support to the AC grid. In this paper, noteworthy SM and MMC configurations capable of DC fault blocking and ride-through are reviewed and compared in terms of component requirements, semiconductor losses, and DC fault handing capability. The review also includes a discussion on control strategies for MMC arm/leg energy balancing during STATCOM operation. [ABSTRACT FROM AUTHOR]