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The paper presents a new signal generator for charge-pumping. Modular structure of the generator is discussed with special emphasis on signal-generation module consisting of five independent signal channels. Digital signal synthesis is chosen to minimize inaccuracies. Noise analysis is performed to demonstrate the validity of the design of signal channel. Calibration procedure is also discussed.

A model of the position of the edge of emitter-base junction in the base and collector current pre-exponential ideality factor in HBT transistor with a SiGe base is presented. The model is valid for transistors with nonuniform profiles of doping and Ge content. The importance of taking into account the dependence of the effective density of states in SiGe on local Ge content and that of electron diffusion coefficient in SiGe on drift field for modeling accuracy is studied.

A set of physical models describing silicon carbide with fitting parameters is proposed. The theoretical I-V output and transfer characteristics and parameters of MOS transistors were calculated using Silvaco Atlas and Crosslight Apsys semiconductor device simulation environments

This work reports on changes in the properties of ultra-thin PECVD silicon oxynitride layers after high- temperature treatment. Possible changes in the structure, composition and electrophysical properties were investigated by means of spectroscopic ellipsometry, XPS, SIMS and electrical characterization methods (C-V, I-V and charge- pumping). The XPS measurements show that SiOxNy is the dominant phase in the ultra-thin layer and high-temperature annealing results in further increase of the oxynitride phase up to 70% of the whole layer. Despite comparable thickness, SIMS measurement indicates a densification of the annealed layer, because sputtering time is increased. It suggests complex changes of physical and chemical properties of the investigated layers taking place during high-temperature annealing. The C-V curves of annealed layers exhibit less frequency dispersion, their leakage and charge-pumping currents are lower when compared to those of as-deposited layers, proving improvement in the gate structure trapping properties due to the annealing process.

The goal of this work was to study nitrogen implantation from plasma with the aim of applying it in dual gate oxide technology and to examine the influence of the rf power of plasma and that of oxidation type. The obtained structures were examined by means of ellipsometry, SIMS and electrical characterization methods.

Experiments presented in this work are a summary of the study that examines the possibility of fabrication of oxynitride layers for Si structures by nitrogen implantation from rf plasma only or nitrogen implantation from rf plasma followed immediately by plasma oxidation process. The obtained layers were characterized by means of: ellipsometry, XPS and ULE-SIMS. The results of electrical characterization of NMOS Al-gate test structures fabricated with the investigated layers used as gate dielectric, are also discussed.

The history of semiconductors is presented beginning with the first documented observation of a semiconductor effect (Faraday), through the development of the first devices (point-contact rectifiers and transistors, early field-effect transistors) and the theory of semiconductors up to the contemporary devices (SOI and multigate devices).

Extensive numerical simulations of FinFET structures have been carried out using commercial TCAD tools. A series of plasma etching steps has been simulated for different process conditions in order to evaluate the influence of plasma pressure, composition and powering on the FinFET topography. Next, the most important geometric parameters of the FinFETs have been varied and the electrical characteristics have been calculated in order to evaluate the sensitivity of the FinFET electrical parameters on possible FinFET structure variability.

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The radiation damage caused by low energy r.f. plasmas has not been, to our knowledge, studied so far in the case of symmetric planar plasma reactors that are usually used for PECVD processes. The reason is that, unlike non-symmetrical RIE reactors, such geometry prevents, basically, high-energy ion bombardment of the substrate. In this work, we present the results of experiments in which we have studied the influence of plasma processing on the state of silicon surface. Very low temperature plasma oxidation has been used as a test of silicon surface condition. The obtained layers were then carefully measured by spectroscopic ellipsometry, allowing not only the thickness to be determined accurately, but also the layer composition to be evaluated. Different plasma types, namely N2, NH3 and Ar, were used in the first stage of the experiment, allowing oxidation behaviour caused by the exposure to those plasma types to be compared in terms of relative differences. It has been clearly proved that even though the PECVD system is believed to be relatively safe in terms of radiation damage, in the case of very thin layer processing (e.g., ultra-thin oxynitride layers) the effects of radiation damage may considerably affect the kinetics of the process and the properties of the formed layers.

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The paper briefly presents the history of microelectronics and the limitations of its further progress, as well as possible solutions. The discussion includes the consequences of the reduction of gate-stack capacitance and difficulties associated with supply-voltage scaling, minimization of parasitic resistance, increased channel doping and small size. Novel device architectures (e.g. SON, double-gate transistor) and the advantages of silicon-germanium are considered, too.

An important element in microelectronics is the comparison of the modelling and measurements results of the real semiconductor devices. Our paper describes the final results of numerical simulation of a micromechanical process sequence of the atomic force microscopy (AFM) sensors. They were obtained using the virtual wafer fab (VWF) software, which is used in the Institute of Electron Technology (IET). The technology mentioned above is used for fabrication of the AFM cantilevers, which has been designed for measurement and characterization of the surface roughness, the texturing, the grain size and the hardness. The simulation are very useful in manufacturing other microcantilever sensors.

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A new method for the fabrication of field emis- sion arrays (FEA) based on bulk/surface silicon micromachin- ing and diamond-like-carbon (DLC) coating was developed. A matrix of self-aligned electron field emitters is formed in sil- icon by mean anisotropic etching in alkali solution of the front silicon film through micro holes opened in silicon oxide layer. The field emission of the fabricated emitter tips is enhanced by a diamond-like-carbon film formed by chemical vapor de- position on the microtips. Back side contacts are formed by metal patterning. Detailed Raman, Auger and TEM investi- gations of the deposited DLC films (nanocrystalline diamond smaller than 10 nm) will be presented. In this paper we dis- cuss the problems related to the development of field emission arrays technology. We also demonstrate examples of devices fabricated according to those technologies.

A steady-state model of partially-depleted (PD) SOI MOSFETs I-V characteristics in subthreshold range is presented. Phenomena, which must be accounted for in cur- rent continuity equation, which is a key equation of the PD SOI MOSFETs model are summarized. A model of diffusion- based conduction in a weakly-inverted channel is described. This model takes into account channel length modulation, drift of carriers in the

SiGe-base HBTs with Gaussian doping distribution are modeled including the effect of the drift field and variable Ge concentration in the base on the diffusion coefficient. Two different Ge distributions in the base are considered: a triangular one and a box one the patterned substrates suffered from a high loading effect demanding an accurate calibration.

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A non-quasi-static model of partially-depleted SOI MOSFETs is presented. Phenomena, which are particularly responsible for dependence of device admittances on frequency are briefly described. Several C-V characteristics of the SOI MOSFET calculated for a wide range of frequencies, preliminary results of numerical analysis and of measurements and brief analysis of the results are presented. Methods of model improvement are proposed

SOI fabrication process was characterized using electrical and TEM methods. The investigated SOI structures included partially and fully depleted capacitors, gated diodes and transistors fabricated on SIMOX substrates. From C-V and I-V measurements of gated diodes, the following parameters of partially depleted structures were determined: doping concentration in both n- and p-type regions, average carrier generation lifetimes in the region under the gate and generation velocity at top and bottom surfaces of the active layer. Structures with short lifetime were studied using a transmission electron microscope. TEM studies indicate that the quality of the active layer in the investigated structures is good. Moreover, these studies were used to verify the thicknesses determined by means of electrical characterization methods.