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1. A Combined Iteration Algorithm for the Implicit Cycles of Gold Price and the US Dollar Index.

Author

Haitao Zheng, Huiwen Wang, and Andi Zheng

Subjects
*ITERATIVE methods (Mathematics), *ALGORITHMS, *SPLINE theory, *GOLD sales & prices, *STOCK exchanges
Abstract

The relationship between gold and US dollar series, which are non-stationary, is commonly known to be negative from a periodic perspective. Is this really the case? This paper established a combined iteration algorithm using the theory of spectral analysis after subtracting the trend using penalized B-spline functions to obtain the implicit cycles in gold and US dollar series. This algorithm accurately separates the trend terms and periodic terms of the two series to produce more precise and complete periodic information. The results show that both series share three common implicit cycles: two long periods and one short one. Both long-period terms are negatively correlated, whereas the short-period terms are positively correlated. [ABSTRACT FROM AUTHOR]

Published
2016

2. CPU-GPU Hybrid Parallel Binomial American Option Pricing.

Author

Nan Zhang, Eng Gee Lim, Ka Lok Man, and Chi-Un Lei

Subjects
OPTIONS sales & prices (Finance), PARALLEL processing, CENTRAL processing units, GRAPHICS processing units, ALGORITHMS, HYBRID systems
Abstract

We present in this paper a novel parallel binomial algorithm that computes the price of an American option. The algorithm partitions a binomial tree constructed for the pricing into blocks of multiple levels of nodes, and assigns each such block to multiple processors. Each of the processors then computes the option's values at its assigned nodes in two phases. The algorithm is implemented and tested on a heterogeneous system consisting of an Intel multi-core processor and a NVIDIA GPU. The whole task is split and divided over and the CPU and GPU so that the computations are performed on the two processors simultaneously. In the hybrid processing, the GPU is always assigned the last part of a block, and makes use of a couple of buffers in the on-chip shared memory to reduce the number of accesses to the off-chip device memory. The performance of the hybrid processing is compared with an optimised CPU serial code, a CPU parallel implementation and a GPU standalone program. [ABSTRACT FROM AUTHOR]

Published
2012