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Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. DRAM memory is challenging, because the roadmap for DRAM calls for continued scaling, eventually reaching half pitches of 14nm and beyond. For DRAM, overlay on some critical layers is much tighter than NAND Flash, with an error budget of 15-20% of the minimum half pitch. For 14nm, this means 2.1-2.8nm. DRAM device design is also challenging, and layouts are not always conducive to pitch dividing methods such as SADP and SAQP. This makes a direct printing process, such as NIL and attractive solution. The purpose of this paper is to review the performance improvements related to overlay and introduce edge placement error analysis for NIL. Improvements in overlay include an extension in the range for high order distortion correction and improvements in control methods such as imprint force, mask to wafer tip/tilt and wafer zone pneumatics near the wafer edge. We also introduce the pattern transfer scheme used to etch features with half pitches below 20nm.

As EUV lithography becomes the new standard for electronic chip manufacturing, identifying suitable materials for higher resolution patterning stands out as a prominent challenge for reaching future technology nodes. Innovative approaches to patterning are becoming more and more relevant as standardly used photoresists approach their limitations. In this work we use the highly-flexible EUV-Interference Lithography tool at PSI for screening of materials. We highlight the EUV lithography exposure mechanism of secondary electron chemistry and its versatility in inducing a solubility switch in photoresists by using a chicken egg-white albumin protein cluster as a photosensitive material to obtain sub-100 nm patterns. Moving from these novel EUV lithography results, we show recent high-resolution highlights obtained towards the patterning of sub-10 nm features.

The development of photoresists is crucial for the progress in lithographic technologies and integrated circuit altogether. For instance, the development of novel EUV resists is a critical enabler of future technology nodes, particularly towards the deployment of high-NA EUV lithography into high-volume manufacturing. Within the scope of a joint resist screening program between PSI and ASML, the development of EUV resists is investigated using EUV interference lithography. In this work, we provide a review of the recent progress in EUV resists by considering several resist platforms provided by different vendors. Lines/spaces patterning is extensively investigated as a function of film processing parameters. The challenge in developing resists is admittedly governed by a resolution-roughness-sensitivity (RLS) performance tradeoff, therefore performance results are presented with critical dimension (CD), dose-to-size (DtS), line-width-roughness (LWR) as well as the z-factor metric associated to the RLS tradeoff. We consider LS patterning between 16 and 13 nm half-pitch to identify materials matching current high-volume manufacturing specifications. We then investigate high-resolution resists for patterning down to 8 nm half-pitch, therefore potential candidates for high-NA EUVL. Further process optimization perspectives are finally discussed towards enabling future technology nodes.

New resists are needed to advance EUV lithography. Tailored design of efficient photoresist is impossible without fundamental understanding of EUV induced chemistry. The absorption of an EUV photon by a thin film resist leads to emission of primary and secondary electrons. The electrons may travel up to tens of nanometers before losing their kinetic energy via collisions which initiate chemical reactions. The “blur” of an aerial image is directly related to the distance that electrons are able to travel and initiate chemistry in the resist. Thus, identifying how to measure and influence the absorption of EUV photons, emission of electrons, and distance traveled by the secondary electrons is extremely beneficial to the resist community. In this work, we present several experimental techniques to probe model polymer materials to investigate the impact of specific chemical groups on three critical resist properties: EUV absorption, electron emission, and the electron attenuation length (EAL). EUV absorption dictates the efficiency of the film to absorb photons. Total electron yield (TEY) provides information on the conversion of absorbed EUV photons to electrons, whereas photoelectron spectroscopy (PES) provides information on energies and abundance of generated electrons. The EAL corresponds to the thickness of a material required to reduce the number of emitted electrons to 1/e of the initial value. The EAL reveals the distance the electrons can travel in a resist film, which is directly related to the electron blur. Correlations between the obtained experimental values is discussed.

The feasibility of using EUV lithography in high volume manufacturing makes the technology a very strong candidate for sub 20nm patterning[1,2]. However defect control remains a major challenge even today. The aim of this paper is to understand propagation of the programmed defects present on the EUV mask to wafer to get an understanding of how stochastic defects may evolve through processes and how we can mitigate it. The propagation of programmed defects from mask to post lithography to post etch at wafer level on wafers exposed on a NXE:3400 EUV lithography module with a simple stack coated with a Chemically Amplified Resist (CAR) with an in-house defectivity mask was studied (Figure 2: stack post etch- see full abstract). We focused on 32nm line/space pitch size, with mask bias of 14.5/17.5(17.5nm absorber lines on mask). We focused on 5 different types of programmed defects with varying dimensions. The programmed defects are organized as a matrix of line bridges(bumps) in a 15x10 array distribution. The biggest line bridge has a size of 20x40nm decreasing down with a fixed step size for each defect type. The smallest line bridge has a size of 6x6nm (Figure 1- see full abstract). The evolution of the defects from mask to wafer post lithography and post etch has been studied both theoretically by calculating change in defect area from a modelled script as well as experimentally with e-beam inspection and other metrology techniques. The end goal is to study the propagation of these programmed defects from post lithography to post etch on wafer through parameters like defect area, defect sizes and stack height information. References [1] EUV Mask and Wafer Defectivity: Strategy and Evaluation for Full Die Defect Inspection; Ravi Bonam, Hung-Yu Tien2, Acer Chou2, et al. [2] The analysis of EUV mask defects using a wafer defect inspection system; Kyoung-Yong Cho, Joo-On Park, Changmin Park, Young-Mi Lee, In-Yong Kang, Jeong-Ho Yeo et al.

The goal of this work is to prepare process readiness towards High NA EUV lithography, by using 0.33NA exposures on NXE3400B scanner. We focus on photoresists, underlayers and etch processes mitigation of P24nm Line Space patterns. Etch transfer has been validated for Metal Oxide Resist (MOR). Furthermore, we investigate challenges to accelerate Chemically Amplified Resist (CAR) P24nm Line Space processes. Also, here, promising patterning results have been achieved. Thin film metrology-friendly methods like Atomic Force Microscopy (AFM) have been performed to characterize and improve the CAR-based etch processes.

Applications that require high resolution patterns are numerous, leading to an increasing demand for compact patterning tools and alternative lithographic concepts. For many scientific applications like biosensing or fabrication of metamaterials, or artificial crystals, the achievable resolution and the patterned area of the fabrication process are of main importance. In the field of high-volume manufacturing, there is a need for high-resolution patterning at the industrial exposure wavelength of 13.5 nm. The main industrial application for compact exposure tools is EUV photoresist development and its related process optimization. The overall patterned area is of minor interest. Instead, the focus is placed on the achievable resolution and quality of the intensity distribution used for the patterning tests. The realized EUV dual beamline allows to address both application fields in a single in-lab setup. By operating the source with an argon/xenon (Ar/Xe) gas mixture, a narrowband spectrum with a main wavelength of 10.9 nm is created without the need of spectral filtering. The resulting intensity of up to 2 mW/cm2 in wafer plane allows large area patterning with highest throughput of several mm2/min. Single exposure fields of 2 x 2 mm2 can be stitched together to achieve an overall patterned area of up to several cm² with minimal stitching borders of ~ 1 μm. By inserting a customized multilayer mirror into the beamline, the emission spectrum of the DPP source (operated with pure Xe gas) is in-band filtered to 13.5 nm, thus allowing qualification of industrial photoresists regarding sensitivity, contrast and resolution. The mask-wafer positioning system for the 13.5 nm beamline is designed for maximum rigidity to minimize relative movements between the mask and wafer that would lower the achievable resolution. Multi-field resolution test masks are created in-house and are exposed in a parallel manner to determine the achievable resist resolution in an efficient manner. Transmission mask designs are optimized by a rigorous simulation model. By tuning the pattern geometry on mask, different patterns like contact holes or nanopillars can be created on the wafer, tailored to the required application.

In the photolithographic process of semiconductor manufacture, a photoresist is exposed to light and then developed to create a pattern on the photoresist surface. After development, a rinse step is necessary to prevent pattern collapse and to remove polymer residues that linger after development. Surfactants are essential in these rinse solutions and help mobilize polymer residues while also minimizing capillary forces that are responsible for pattern collapse. An ideal surfactant system interacts with the polymer surface enough to mobilize debris particles, but not enough to cause swelling and shift the critical dimension; while at the same time creating a surface tension and contact angle to prevent pattern collapse. In this work, we investigated various non-fluorinated surfactants and their interaction with EUV photoresists by measuring surface tension, contact angle, and photoresist swelling. Although the difference of solubility parameters (DSP) between surfactants and photoresists were shown to correlate to photoresist swelling. No correlation between resist swelling and the difference of solubility parameters was found in the study. Through this work, we identified that ideal surfactant rinse properties can be achieved in a fluoro-free surfactant formulation. Ideal fluoro-free EUV surfactant rinse formulations achieve no pattern collapse, low CD-shift, and good residue clean performance for an EUV photolithographic process.

High Numerical Aperture (NA) EUV lithography will require very thin resist films. This reduction in thickness will challenge most metrology techniques, except for Atomic Force Microscopy (AFM). Indeed, thinner resist films allow AFM to reach a better depth accuracy and a higher throughput. In this work, we demonstrate the capabilities of AFM metrology on 16-nm half-pitch resist lines obtained with 5 resist film thicknesses ranging from 10 to 30 nm. As we show, AFM provides relevant information about the pattern dimensions (resist height, line top roughness) as a function of exposure dose, and even about the bottom trench roughness on films with thickness < 10 nm.

In this paper, we will report the modeling of behaviors of low-energy secondary electrons (LSEs) in a charge effect correction system (CEC), which compensates image placement errors predicted by writing layout data, on mask blanks with and without a charge dissipation layer (CDL). For the demand of low line edge roughness and high critical dimension uniformity, the more dose-sensitivity of resist is lowered, the more a contribution of LSE is made in charge effect, because the number of primary electrons generating LSEs also increases. In such a situation of advanced lithography, we have tackled challenges of CEC system in terms of blanks with and without CDL. On blanks without CDL, CEC needs to predict the complicated charge distribution including that of LSE which is affected by electromagnetic field of optical system and already-existing resist surface charge. On blanks with CDL, CEC needs to predict LSE charge diffusing on the resist surface. In order to address these challenges, NuFlare Technology (NFT) has developed models of CEC on blanks with and without CDL. In order to verify these models, we evaluated the surface charge effect in the writing on blanks with resist of 100 μC/cm2 dose-sensitivity on electron beam mask writer EBM-9000/9500. Furthermore, as another solution besides CEC and CDL, NFT has developed a charge effect reduction (CER) system which prevents LSEs from re-entering into the resist surface. We have verified CER by comparing the experimental results between EBM9500 and EBM9500PLUS, which is the NFT’s latest variable-shaped beam with CER system.

For the semiconductor and liquid crystal display manufacturing process, resist removal by using laser irradiation has been investigated instead of conventional processes such as oxygen plasma and chemical method. An advanced laser resist stripping method for the positive-tone diazonaphthoquinone (DNQ) / novolak resist was successfully developed without causing the laser damage to the Si wafer. The pulsed laser irradiation in water can improve the resist stripping effect when compared with that of conventional atmosphere irradiation, however, the mechanism has yet to be clarified. In this study, we investigated the analysis of resist stripping phenomenon by using a high-speed laser imaging system. A pulsed laser at 640 nm (pulse duration: 40 ns) was used as an illumination laser and a CCD camera detected the reflectance image on the sample. Time resolution of this system depended on the pulse duration of illumination laser. Time-resolved images were acquired based on the “1-on-1” method. Time-resolved images were acquired from 40 ns to 10 us after the laser irradiation. At the laser irradiated spot, changes of the resist were observed after 40 ns from the laser irradiation. The resist was completely stripped from the Si wafer surface after 10 us. The duration of resist removal phenomenon in the water condition was longer than that in the normal atmosphere condition. A resist stripping mechanism could be elucidated by combining experimental high-speed laser imaging and a finite element (FE) analysis. The mechanism of the resist stripping in the water condition will be presented.

Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field/shot-by-field/shot deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. Any new lithographic technology to be introduced into manufacturing must deliver either a performance advantage or a cost advantage. Key technical attributes include alignment, overlay, defectivity and throughput. Advanced memories, such as DRAM and phase change memory are challenging, because the roadmap for these devices calls for continued scaling, eventually reaching half pitches of 14nm and beyond. Scaling also impacts the overlay budget. For DRAM, as an example, overlay on some critical layers is much tighter than NAND Flash, with an error budget of 15-20% of the minimum half pitch. For 14nm, this means 2.1nm - 2.8nm. DRAM device design is also challenging, and layouts are not always conducive to pitch dividing methods such as self-aligned double patterning (SADP) and self-aligned quadruple patterning (SAQP). This makes a direct printing process, such as NIL an attractive solution. In previous papers, overlay has been addressed by applying methods that are unique to NIL. In 2018, Hiura et al. reported a mix and match overlay (MMO) of 3.4 nm and a single machine overlay (SMO) across the wafer was 2.5nm using an FPA-1200 NZ2C four station cluster tool. These results were achieved by combining a magnification actuator system with a High Order Distortion Correction (HODC) system, thereby enabling correction of high order distortion terms up to K30. The HODC system utilizes a digital micro mirror array to correct distortion on a field-by-field basis. Further improvements to the system have been achieved by extending the range of the HODC system by applying a diamond like carbon film to the wafer chuck in order to reduce friction. Other process variables that are unique to NIL and that can be considered as process tunable variables include imprint force and tip/tilt of the imprint head relative to the wafer substrate during exposure. These variables can be used to modulate and control the overlay errors near the imprint field edges and provide good overlay control. An additional method to improve overlay is Drop Pattern Compensation (DPC). DPC is used to create a resist drop pattern designed to remove non-flatness originating either from the wafer/wafer chuck or pattern topography, so as to minimize mask bending. Finally, it is also possible to correct distortion signatures on wafer by fabricating a “refined” mask which takes into account the distortion signature. The purpose of this paper is to describe the application of the improvements discussed above to realize a mix and match overlay of less than 3nm.

In this paper, we show the characteristics of particle contamination induced defect footprints and explain the basic principles of their formation during ebeam exposure. To verify these principles, we carried out full 3D Monte Carlo Simulations of electrons impinging on the mask stack (modelled as PMMA, Cr, and SiO2), covered by a defect layer and compared the simulated contour with SEM images of real defect footprints. The relevant physical property is the deposited energy inside the PMMA layer. First, we verified in our simulations that the deposited energy is indeed antiproportional to the beam energy. In a second step we simulated scattering trajectories of electrons to quantify the nontrivial dependence of deposited energy on the size and thickness of defects as well as defect composition. We also considered shotnoise statistics due to the limited number of electrons in ebeam pattern generation accompanied by gaussian smoothing of the deposited energy representing subsequent processing and demonstrate that considerably increased energy deposition to an ebeam-active resist can occur in direct vicinity of a scattering defect when scattering widens the beam opening angle leading to longer trajectories inside the resist. The pattern generator is variable-shaped electron beam (VSB) with 50 keV energy operated in the high-volume photomask manufacturing facility at AMTC Dresden, the Monte Carlo simulation software is virtualSEM from GenISys GmbH.

The developments of ultra-high purity material which resist the damage by DUV laser are strongly required. According to the general mechanism of laser-induced damage, some kinds of defects and contaminations on the optical material are very important factors for DUV laser-induced damage. The borate crystal SrB4O7 (SBO) was reported to be a nonlinear optical material with a wide transparency down to 130 nm. In this study, we grew a high-quality SBO single crystal and measured the surface DUV laser-induced damage threshold (LIDT) in several polished conditions. The SBO crystals grown over 13 days was 60 x 6 x 30 mm3 (a x b x c) without cracks or other defects. Two (020) plates were cut from the SBO crystal, and the both faces of the plates were optically polished. After that, we introduced catalyst-referred etching (CARE) to the one plate in order to atomically produce flat and damage-free SBO surfaces. As a result of the CARE treatment at a removal rate of 364 nm/h, the surface condition changed drastically, and a linear step-and-terrace structure was grew with a step height of 0.2 nm. The surface LIDT in several polished conditions were measured with a 1-on-1 method at 266 nm (5 ns pulse width). The polarization direction was parallel to the c-axis of the (020) sample. Synthetic silica was also evaluated for comparison. The surface LIDT (17.3 J/cm2) of SBO after optical polishing is 4.3 times that of synthetic silica (4.0 J/cm2). In addition, the surface LIDT (24.1 J/cm2) of CARE-treated SBO is 6.0 times that of synthetic silica. This suggests that CARE-treated SBO crystals are a promising material for optical components in high-power DUV laser systems.

In this work we studied the impact of stochastic resist defects on electrical measurements of BEOL structures, and seek to demonstrate that large electrical test structures, built with a relatively simple patterning flow, can be used in the early stages of resist, and patterning development, as the electrical failures are almost exclusively caused by resist defects. To that end, single-layer electrically testable metal patterns at minimum metal pitch of 28nm were created using a single 0.33NA-EUV exposure and a metal damascene process flow. A bright field mask was exposed with a metal-organic, negative-tonedevelopment resist process to create trench structures that are transferred into an oxide dielectric layer. Following this, the trenches were filled with ruthenium (Ru) for electrical testing of meander resistor and fork-fork structures.

Significant efforts have been dedicated to the development of inorganic-organic hybrid materials for next-generation EUV resists. Among the various synthesis, vapor-phase infiltration of metal source into existing e-beam photoresists using ALD process has drawn great attention. In this work, we have demonstrated the vapor-phase infiltration of both Hf and Al precursors into PMMA and HSQ resists, respectively. For example, under the electron exposure with 100 eV, both hybrid resists show relatively higher EUV absorption, increasing positive and negative tone. The detailed photochemical reactions of on electron exposure were investigated using an in-situ FTIR equipped with electron gun capability.

As mass production of advanced semiconductors using EUV lithography has begun, there was a high demand for various EUV actinic tools by mask shops, blank makers, and material suppliers. For example, EUV microscope would need for EUV mask defect review, EUV phase measurement tool would need for EUV PSM, and EUV transmittance, reflectance measurement tool would require EUV pellicle. Moreover, EUV test exposure tool is also required to develop EUV resist materials and process equipment. These are currently being developed as stand-alone tools but it is not easy to introduce all the individual tools due to the high cost of ownership, large fab space and low utilization at the beginning stage. In order to solve these difficulties of the industry, we have developed an equipment that can implement multiple solutions within the same system. Depending on the user's specific purpose, the various functions can be freely combined in a LEGO style with cost effective way to maximize equipment utilization and reduce the fab space. In this paper, we will discuss how this concept is realized for EUV mask and EUV material industry.

In the development of highly resolving and highly sensitive resist materials, stochastic phenomena (LER and stochastic defect generation) are a critical issue. In this study, the dependences of chemical gradient (an indicator of LER) on the half-pitch of line-and-space patterns, the thermalization distance of secondary electrons, EUV optical contrast, the photoacid generator (PAG) concentration, the photodecomposable quencher (PDQ) concentration, and the effective reaction radius for deprotection were investigated using a simulation on the basis of the sensitization and reaction mechanisms of chemically amplified EUV resists. The relationships between resolution, LER, and sensitivity were formulated in terms of thermalization distance.

EUV (extreme ultraviolet) lithography is progressively being inserted in high volume manufacturing of semiconductors to keep up with node shrinkage. However, defectivity remains one big challenge to address in order to be able to exploit its full potential. As in any type of lithographic process, processing failures and in-film particles are contributors that need to be reduced by the optimization of coating and development processes and improved dispense systems. On top of these defects, stochastic failures, due to photon shot noise or non-uniformities in the resist, are another major contribution to the defectivity. To support their mitigation, etch process can be used to avoid their transfer to underlying layers. However, it requires a sufficient resist mask thickness. For line and space patterns, providing more resist budget comes with a trade-off which is the increase of pattern collapse failures, especially with shrinking critical dimensions. Collapse mitigation approaches are therefore very important to enable tight pitches and were explored. Stack engineering and especially optimization of resist under layers will be crucial components to enable patterning and defect reduction of shrinking pitches. Finally, as an alternative to traditional chemically amplified resists, metal containing resists are also promising because of their inherent high etch resistance. Dedicated hardware and processes were developed the use of such materials and prevent metal contamination to other tools during further processing steps. In this report will be presented the latest solutions to further decrease defectivity towards manufacturable levels and provide more process margin to achieve better quality patterning towards the limits of NA 0.33 EUV exposure. Furthermore, technologies to improve CD uniformity and stability, which are required for mass production, will also be reported.

As the industry continues to push the limits of integrated circuit fabrication, reliance on EUV lithography has increased. Additionally, it has become clear that new techniques and methods are needed to mitigate pattern defectivity and roughness at Litho and Etch together with eliminating film-related defects. These approaches require further improvements to the process chemicals and the lithography process equipment to achieve finer patterns. In particular improvements in the coater/developer hardware and process are required to enable the use of a wide variety of chemicals as well as compatibility with existing systems. This paper reviews the ongoing progress in coater/developer processes that are required to enable EUV patterning sub-30nm line and space by using MOR (Metal Oxide Resist).

For EUV lithography, hemicellulose EUV resist was proposed and studied the relationship between lithography performance and resist structure. The key parameters of hemicellulose resist for improvement of EUV lithography performance are hemicellulose content and resist structure (EUV sensitivity unit and sensitivity enhanced unit). OPAL-R4 which has 3 times the hemicellulose content and special resist structure compared with OPAL-R1 is the best performance. For high-NA EUV lithography, hemicellulose EUV resist has a potential of high performance.

This paper covers the writing performance of our multi-beam mask writer, MBM-1000, which has been developed for the 5 nm technology node. It exposes low sensitivity resist faster than VSB writers and prints complex patterns with better fidelity. We will describe its writing performance and compare it with our VSB writer, EBM-9500 PLUS. MBM-1000 has pixel-level dose correction (PLDC). PLDC modulates dose profile at pixel level to improve pattern fidelity and patterning resolution. It is integrated with MBM-1000 data path and runs inline. We will also report functions and writing results of MBM-1000 with PLDC.

To this day there is no established practical method available to identify the “optimal” base dose in e-Beam lithography for mask making. Methods range from choosing the “zero-bias” exposure dose that yields CDmeasured = CDtarget to real isofocal calibrations that require to print the structures at different blurs/focus settings. While the latter yields an optimal base dose, it requires a significant experimental procedure, whereas the former uses a pretty simple experiment but will likely yield a non-optimal base dose due to process effects (e.g., lateral resist development). Here we present a novel method to find the optimum base dose for e-Beam mask exposures that requires only a simple experiment. Surprisingly, the exposure doses required to print features with different densities at the same CD does depend on the process point, adding an error term to the proximity effect correction in case the correction is not aligned to this. This is due to the fact that for a given stack and acceleration voltage, a PEC method will deliver one fixed dose range, whereas the experimentally required dose range depends on the process point chosen. This observation can be used to calibrate the base dose such that it matches the dose range obtained from PEC. Moreover, it can be used to add a new criterion to proximity effect correction – the iso-focal condition - to not only correct for line width (also called critical dimension, CD) linearity and density dependent effect, but to also add immunity to process variations such as focus and blur variations.

Nanoimprint lithography (NIL) is a promising technology on next generation lithography for the fabrication of semiconductor devices. NIL is a one-to-one lithographic technology with a contact transfer methodology using templates. Therefore, critical dimension (CD) error and defect performance of templates has direct impact on wafer performance. The previous paper reported that the self-aligned double patterning (SADP) process on master template had better performance on resolution and defect performance [2]. In proceeding with development of SADP template process technology, we found that CD errors occurred in the area with a pattern density change. CD control over any pattern density is one of the critical issues. In this report, we have investigated the impact of the proximity effect correction (PEC) and fogging effect correction (FEC) parameters for electron beam writing on gap space and core space. It was found that the optimal PEC parameter for resist CD is not the best for the core space and the gap space. The resist CD is uniform, but there is a difference in resist shape on the local pattern density variation. It was also found that the core space had dependency on global pattern density even if the optimal FEC parameter for resist CD was applied. FEC can correct resist CD, but it cannot adjust resist shape. By using the optimal PEC and FEC parameters for SADP process, the gap space range of 0.6 nm and the core space range of 0.5 nm were successfully obtained.

Ni based nano/micro structures are wildly applied in fabrication of nano/micro imprint template, meta-surface, diffractive elements, etc. In this work, the fabrication of Ni structures by electroplating method on a AIST resist is studied. AIST is first deposited on glass substrate to form a layer of thin film. Then, the film is exposed to arbitrary pattern structure by laser direct writing system. And the exposed region changes from amorphous state to crystalline state due to photo-thermal physical reaction. Owing to the different development rates of the exposed region and the non-exposed region, the micro/nano structures can be obtained. Subsequently, continuous Ni structures were formed by electroplating method on the former AIST structure which confirmed by the images of optical microscope(OM) and scanning electron microscope(SEM). This work greatly broadens the application scope and prospect of direct laser writing in heat- mode lithography technology.

Extreme ultraviolet lithography (EUVL) has been adopted into high volume production for advanced logic device manufacturing. Due to the continuous size scaling requirement for interconnect fabrication, EUVL with self-aligned double patterning (SADP) formation has attracted substantial research attention [1]–[6]. Double patterning techniques in EUVL achieve pitch halving in the final feature by using the spacer defined approach and self-aligned block (SAB) mitigates the block placement error by leveraging etch selectivities and material filling capability. The current challenge in EUV SADP is the pattern transfer process from lithography to mandrel formation. In this step, the target critical dimension (CD) of the feature needs to shrink by half from the lithography CD during the etch process. The increasing aspect ratio during this etch potentially deteriorates the pattern validity and the line edge roughness (LER) [5]. In addition to these challenges, EUVL has a fundamental bottleneck due to stochastic effects which can lead to device degradation by defect formation and edge-placement-error (EPE) [7]–[10]. LER of the line and space pattern is one of the main contributors to EPE. Effective methods of LER reduction in both process and integration are needed in order to reduce pattern variation and boost device performance. In our research, we examine three approaches to reduce LER on the EUV SADP line pattern. This includes photoresist surface smoothing techniques, patterning layer material study, and tone inversion integration. The photoresist surface smoothing techniques involve a specific plasma process on the EUV chemical amplified resist (CAR) to achieve > 15% of improvement on LER from lithography to post etch performance. The patterning layer material study reveals an optimum patterning stack to minimize etch-induced line wiggling and etch selectivity requirements for LER performance. Finally, a first demonstration of EUV SADP tone inversion process integration is presented as a method to provide additional benefits to LER reduction. A detailed analysis of line performance from each processing step will be examined.

Whilst traditional chemically amplified resists (CAR) support the initial insertion of EUV lithography, a wide range of other resist materials are being examined for future nodes, aiming to identify a photoresist that simultaneously meets RLS and defectivity requirements. It is becoming increasingly clear that this should involve a novel mechanism—a new chemistry that can be tuned to allow for improvement of the RLS requirements. One potential approach is the multi-trigger concept wherein a reaction will only occur when multiple elements of the resist are initiated concurrently and in close spatial proximity. At the centre of exposed features, where the exposure dose is sufficient the resist reaction is thus catalytic as in a CAR, but at the edge of the features the reaction is secondorder in nature, and thus the chemical gradient is increased. In effect the resist features an intrinsic, inversely dose dependent, quenching of the catalysis, enhancing chemical contrast and thus resolution, and reducing roughness, whilst eliminating the materials stochastics impact of a separate quencher. The multi-trigger material previously presented consists of a base molecule and a crosslinker, which represent the resist matrix, together with a photoacid generator (PAG). Research has been undertaken to improve this resist, in particular focusing on improving resist opacity and crosslinking density. Our work on high-Z cross-linker molecules mark I and mark II has previously been reported and LER figures below 3 nm for lines and spaces patterned at 14 nm half pitch using the high opacity MTR resist on the EUV-IL exposure tool at PSI were shown. Here we present results from further work focused on the enhancement of the high-opacity MTR resist. A new high- Z crosslinker molecule, mark III, has been synthesized and introduced in the MTR resist to make the high opacity MTR compatible with the ethyl lactate and PGMEA casting solvents. We report results obtained using the new MTR system containing the high-Z cross-linker mark III, with a variation of process conditions and formulation variations. The lithographic performance, of a formulation containing this crosslinker, at pitch 32nm patterned on an NXE3350 is presented A biased LWR of 4.2 nm for a line width of 15.1 nm is shown. Introducing a PEB induces performance changes for the MTR4L3Y(2) resist. The sensitivity improves by over 20% with 80 °C PEB. However, the PEB does lead to a 12% increase of the LWR. Overall, the lowest Z factor (using biased LWR) occurs with a 60 °C PEB temperature. The Z factor is also significantly lower with a film thickness of 22.5 nm compared to 20 nm. The thickest film thickness tested using the NXE3350 is 22.5 nm. However, at PSI, 12 nm lines on a 28 nm pitch were patterned with an LWR of 2.07 nm using a film thickness of 25 nm. In addition to varying the opacity of the resist, we have also investigated increasing the activation energy of the selfquenching aspect of the MTR system. In this case, MTR8 has a higher activation energy than MTR4. Having a higher activation energy should allow introduction of PEB to increase crosslinking and reduce pattern collapse, whilst simultaneously preserving the self-quenching behaviour. We present results which show a decrease in dose and Zfactor using MTR8 at this formulation ratio compared to MTR4, when tested at PSI. The results also show a Z factor improvement when using a 60 °C PEB. A standard opacity multi trigger resist was patterned on the MET5 at the Lawrence Berkeley National Laboratory, and the effect of different development processes was studied using 1:1 dense line features at pitch 32nm. Reducing the development time in nBA had an adverse effect on pattern collapse and LWR. However, changing to on track development process using 2-heptanone gives a 10% LWR improvement at the 25 nm film thickness studied. Additionally, a pillar pattern was studied when using a film thickness of 28 nm. Here we present pillars with a LCDU of 1.85 nm with a CD of 21.4 nm patterned at a 40 nm pitch.

Although line edge and line width roughness (LER/LWR) have been key metrology challenges over the last 15 years, the advent of extreme-ultraviolet lithography (EUV) has increased the importance of its measurement and control. Lithographically printed features are now small enough that randomness in resist chemistry and in EUV photon during exposure results in noise in the patterned resist. This not only affects LER/LWR, but also defect density, including missing holes, shifted features, bridged lines and holes, and line shorts, among others. Well before these stochastic induced roughness variations, there have existed various techniques to analyze roughness. These include power spectral density algorithms, methods to account for instrument bias in the data, identify and filter noise, and specify measurement uncertainty. In this work, analysis methods to evaluate LER and LWR spatial wavelengths, including partitioning and filtering out instrument errors, such as noise and probe effects are presented. Our approach is based on wavelet-transform multiresolution analysis. One of the key advantages of wavelet transform over other signal processing techniques are its spatial-frequency localization and multi-scale view of the components of a profile or surface. This allows decomposing the data into different bands based on specific cutoffs and evaluating different approximations and surface-details at each cutoff band. A priori noise and probe information are used to determine and remove instrument-effects from the data, before calculating the unbiased roughness. The strength of this approach is that is it targeted only to specific spatial wavelengths that are associated with instrument noise or artifacts.

Polymeric materials with an imaging chemistry based on the main chain cleavage under the influence of photogenerated acid are a promising resist platform for EUV lithography. Backbone scission resist materials are, in principle, capable of creating very small structures due to the fact that the removing parts can have dimensions in the order of the monomers that they consist of. Nevertheless, in the case of the commonly used non-chemically amplified materials of this type, issues like sensitivity and poor etch resistance limit their applications, whereas inadequate etch resistance and non-satisfactory process reliability are the usual problems encountered in acid-catalyzed materials based on main chain scission. In this work, we report on optimization of the formulation of new high-sensitive polymeric materials for EUV lithography by tuning the ratio between the photoacid generator (PAG) and the base quencher. In our material design, the acid-catalyzed chain cleavable polymers contain very sensitive acid-labile bonds in their backbone while they remain intact in alkaline ambient. These photoresists were evaluated with several PAG and base quencher (BQ) loadings. The PAG ratio spans from 4% to 7% with respect to polymer weights, whereas the BQ ratio tuned to 5%, 10%, and 15% with respect to PAG weight. High-performance patterning capabilities were achieved for linesspaces down to 22 nm half-pitch using EUV interference lithography. We report linewidth roughness versus dose-to-size for 25 nm and 22 nm half-pitch for different PAG and BQ loadings and provide a comparison.

The extraordinary success story that is Moore’s Law required many technological components to come together at the right times. This tutorial will tell this story through the lens of one of the key components: the patterning materials, in particular the photoresists. Every chip ever produced has used some form of microlithography, usually photolithography, which has historically been the gating technology for how quickly features sizes could be shrunk. Starting with cyclized rubber resists, the industry went on to use DNQ Novolak systems for a quarter century, before switching wavelengths from near-UV to 248 and 193 nm, then to 193 nm immersion. Every one of these switches required the invention of a new photoresist platform, new resin systems and even new imaging concepts, such as the use of chemically amplified resists beginning with 248 nm. For the materials scientist, Moore’s Law has historically been a race to the next wavelength. This sequence of more or less frantic developments is coming to an end as we near the physical limits of microlithography. With the introduction of EUV lithography, the finish line of this race is in sight: today’s EUV resists are still far from perfect, and this presentation will cover their issues and the paths forward, but there can be no doubt that with EUV, we have reached what appears to be the Final Wavelength. However, the need for better, faster, cheaper process options will not go away, and bottom up technologies such as DSA, selective or self-aligned patterning, and other processes with atomic level precision will need to continue to be developed. The future will see new non-CMOS device types and possibly even circuits which function according to the laws of relativistic quantum physics, all of which will require new materials and bring new challenges. While photolithography is entering its end game, the job of the material scientists is far from done. The presented manuscript is a slide deck, not a formal SPIE conference proceedings paper.

Wafer-level nanoimprint lithography (NIL) has increasingly become a key enabling technology to support new devices and applications across the photonic industry. Leading manufacturers of augmented reality devices, optical sensors and biomedical chips are already utilizing NIL and benefitting from the flexibility and efficiency of this technology. In particular, UV-NIL is capable to replicate most complex micro- and nano-scale structures without compromising the mass manufacturability. Together with the recent advances in the supply chain for high index resists and substrates the capabilities of this technology are emerging rapidly. As presented in this work, UV-NIL gives nowadays very large degree of freedom for best optical design and according performance.

The development of EUV resists is one of the major challenges for the deployment of high-NA EUV lithography, which is on the roadmap for high-volume manufacturing of future semiconductor technology nodes. Resist performance is admittedly governed by a resolution-roughness-sensitivity (RLS) tradeoff. This study reports on the EUV resist progress achieved during the last year in the framework of the resist screening program by PSI and ASML. An extensive performance characterization of different resists was carried out using the XIL-II beamline EUV interference lithography (EUV-IL) tool at the Swiss Light Source (SLS). We present the upgraded screening metrology used in 2020 at PSI enabling increased confidence in results. We report material performance towards patterning lines/spaces features with respect to the key parameters of RLS: half-pitch (HP), dose-to-size (DtS), line-width-roughness (LWR), as well as Z-factor for overall performance consideration. General progress in EUV resist development is reviewed by considering several resist platforms available today from different vendors. Different molecular and chemically amplified resist materials are demonstrated as viable for 16 nm resolution technology nodes. One chemically-amplified resist vendor shows suitable materials for 13-nm-resolution technologies while exhibiting potential for further downscaling. We present different metal-oxide resists screening with resolutions down to 10 nm HP. We finally discuss the overall progress of materials achieved between 2019 and 2020 towards reaching high-NA.

Substrate Conformal Imprint Lithography (SCIL) solves the limitations of PDMS soft-stamp NIL techniques (resolution, pattern deformation, overlay) and allows low-pressure wafer scale conformal contact and sub-10 nm resolution using a novel silicone rubber stamp. SCIL showed direct replication of sub-50nm patterns in silica over 200mm wafers with stamp lifetimes over 500 imprints, for AR, NIL resist with an index of up to n=1.96 and overcoat layers of up to n=2.1. Replication of slanted grating patterns in multiple orientations over the wafer are possible. First results of full 300mm wafer imprints will be shared.

Improved lithography resolution provided by EUVL simplifies the patterning process and makes it possible to use less restrictive design rules. This in turn enables cost effective scaling with extendibility. There are several technical challenges and infrastructure gaps that need to be resolved to make EUVL suitable for high volume manufacturing (HVM). These gaps relate to development of a stable and reliable high power EUV source, EUV resist and EUV compatible photomask infrastructure. Realization of Actinic patterned mask inspection (APMI) capability is a critical component of the required Photomask infrastructure [1,2]. Most critical enabler of actinic patterned mask inspection technology/capability has been the EUV source. In this contribution, we will discuss key aspects of the developed High-Volume Manufacturing (HVM) worthy LPD EUV source for APMI. These include performance aspects such as brightness and spatial position stability of the EUV emission, dynamics of the EUV-emitting plasma and long-term stability of the source

Extreme ultraviolet (EUV) lithography has been begun high volume manufacturing (HVM). To allow for robust processing, both CAR and novel metal oxide resist (MOR) materials are needed, but they each come with unique challenges specific to the layer being printed. CAR resist shows good capability for CH printing and pattern transfer. However, specific processing techniques for the pattern transfer is required to mitigate LCDU issues. Additionally CAR L/S printing shows robust capability at 18nm HP, but when approaching 16nm HP, the defect process window is impacted by collapse and bridging. For ultimate resolution, novel materials such as MOR have been demonstrated but sensitivities of the materials for CD stability and defectivity need to be mitigated. TOKYO ELECTRON investigates ways to reduce these risks with a novel approach for coating process, post exposure bake, and developing sequence. This paper reports technologies to improve CDU, PW, and defectivity. In addition, we report solutions of solving metal contamination risk for MOR while maintaining productivity.

The application of the ethyltrimethylammonium hydroxide (ETMAH) as alternative developer solution for EUV lithography was investigated (compared to the tetramethylammonium hydroxide or TMAH standard developer). Early reports have shown that at a specific or optimal developer concentration of around 0.20N the ETMAH developer allows mitigation of resist-based stochastic defects (increase in stochastic defect margin) while maintaining lithographic performance. Results obtained here suggest that with the use of a non-ionic surfactant additive for the ETMAH developer solution LWR reduction was achieved (compared to TMAH). This improvement in LWR was achieved while preserving resolution, sensitivity, and stochastic defect margin.

Accurate and fast lithography model is necessary for computational lithography applications such as optical proximity correction (OPC) and lithography rule check. In lithography model, optical model calculates image intensity followed by resist model that outputs a resist contour. Resist model is an empirical model, in which images are convolved with resist kernels and their weighted sum is used to derive a resist model signal that is compared with some threshold. Conventional resist model use a simple form of resist kernels such as Gaussian kernels, therefore it requires many kernels to achieve high accuracy. We propose to use free-form resist kernels. Resist model has the same structure as convolutional neural network (CNN), thus, we represent resist model with free-form kernels in CNN and train the network. To avoid overfitting of the proposed model, we initialize the model with conventional Gaussian kernels. Training data is carefully selected so that resist contour is accurately predicted. A conventional resist model with 9 Gaussian kernels is converted into a model with 2 free-form kernels, which achieves 35% faster lithography simulation. In addition, simulation accuracy in CD is improved by 15%.

Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. DRAM memory is challenging, because the roadmap for DRAM calls for continued scaling, eventually reaching half pitches of 14nm and beyond. For DRAM, overlay on some critical layers is much tighter than NAND Flash, with an error budget of 15-20% of the minimum half pitch. For 14nm, this means 2.1-2.8nm. DRAM device design is also challenging, and layouts are not always conducive to pitch dividing methods such as SADP and SAQP. This makes a direct printing process, such as NIL and attractive solution. The purpose of this paper is to review the performance improvements related to overlay, resolution and pattern transfer. Improvements in overlay include control methods such as imprint force, mask to wafer tip/tilt and pneumatic controls at the wafer edge. We also introduce the pattern transfer scheme used to etch features with half pitches below 20nm.

We present a novel two-photon 3D printing approach based on a dedicated resist chamber in which we apply a quasi-static electric field with variable orientation and amplitude during the 3D printing process. This allows aligning the director of not yet polymerized liquid-crystal elastomer resist. After two-photon exposure, the alignment is “frozen” in the polymerized voxel. For the next voxel, the electric field vector can be changed, etc. In this manner, we can 3D print hetero-microstructures of liquid-crystal elastomers. We envision applications under ambient conditions where mechanical actuation is induced by temperature variation or by focused light.

We discuss here our revolutionary technique to both apply photo resist and develop latent images in photo resist using dry technologies instead of the existing wet spin coating and development that have been the standard over the last several decades. We will review the key advantages of dry resist processing over wet resist processing: stability, photo sensitivity, environmental footprint, and cost. This nascent technology has demonstrated best in class resist performance at leading edge design rules, breaks several long standing tradeoffs in EUV photoresist materials, and opens the door to a new world of innovations in EUV lithography patterning.

As contact dimensions continue to shrink to support scaling, local CD variation (LCDU) becomes a critical driver of electrical variation and defectivity. Continued logic scaling is highly dependent on middle of line (MOL), which further amplifies the need for LCDU improvement. LCDU improvement will be critical to improving edge placement error (EPE). The same concepts can also be applied to back end of line (BEOL) vias. Since lithography tools are unable to consistently print contacts below 20 nm, it is typically necessary to shrink through etch. There are various etch techniques we can use to shrink contact dimensions each having different impacts on LCDU and defectivity. In this study we explore the impacts of various shrink methods to optimize LCDU and defect density. In this study a simple patterning stack of SiN + OPL + ARC + resist is used to simulate contact patterning. Various etch chambers and shrink techniques are used to reach a target CD range and LCDU and defect density are evaluated. The chambers evaluated include TEL’s conductor etcher and TEL’s dielectric etcher. LCDU data is collected using CDSEM. Defect density is evaluated using various etch techniques. Etch techniques such as deposition on resist, ARC and OPL, descum steps, pulsing and quasi atomic layer etch are explored. Multiple types of deposition techniques are used including selective deposition and cyclic deposition and trim. These techniques are optimized to be sensitive to open area and correct for local CD variations. On wafer LCDU performance of

For many years traditional 193i lithography has been extended to the next technology node by means of multi-patterning techniques. However recently such a 193i technology became challenging and expensive to push beyond the technology node for complex features that can be tackled in a simpler manner by the Extreme UltraViolet Lithography (EUVL) technology. Nowadays, EUVL is part of the high-volume manufacturing device landscape and it has reached a critical decision point where one can push further the single print on 0.33NA full field scanner or move to a EUV double patterning technology with more relaxed pitches to overcome current 0.33NA stochastic limits. In this work we have selected the 28nm pitch dense line-space (P28) as critical decision check point. We have looked at the 0.33NA EUV single print because it is more cost effective than 0.33NA EUV double patterning. In addition, we have conducted a process feasibility study as P28 in single print is close to the resolution limit of the 0.33NA EUV full field scanner. We present the process results on 28nm dense line-space patterning by using Inpria’s metal-oxide (MOx) EUV resist. We discuss the lithographic and etching process challenges by looking at resist sensitivity, unbiased line edge roughness (LER) and nano patterning failures after etching (AE), using broad band plasma (BBP) and e-beam (EB) defectivity inspection tools. To get further understanding on the P28 single patterning capability we have integrated the developed EUV MOx process in a relevant iN7 technology test vehicle by developing a full P28 metallization module with ruthenium. In such a way we were able to carry on electrical tests on metallized serpentine, fork-fork and tip-to-tip structures designed with a purpose of enabling further learning on pattern failures through electrical measurements. Finally, we conclude by showing the readiness of P28 single exposure using Inpria’s MOx process on a 0.33NA EUV full field scanner.

As the semiconductor industry continues pushing Moore’s law to the next node, interconnect structures scaling will be a key element to performance improvement of functional devices. However, the requirements for low LCDU and defectivity of these interconnect structures have become more stringent with continuous scaling. In this paper, a fundamental study is conducted to understand the impact of various factors on the patterning of EUV single exposure vias, and to find effective strategies to shrink CD while improving LCDU and defectivity. The work is based on a 40 nm pitch orthogonal via array baseline, and probes different patterning factors including illumination, resist materials, stack, scanner, and develop methods for LCDU improvement and defectivity reduction. The patterns are transferred to bottom dielectrics to study the evolution of LCDU and defectivity during etching.

Extreme UltraViolet (EUV) lithography has come a long way since the pioneering work in the mid 1980’s. In 2019 the first commercially available smartphones, which included IC’s made with EUV, demonstrated that EUV had entered high volume manufacturing. In the presentation a brief review will be given how many technology obstacles in the scanner and the scanner infrastructure have been overcome. Next an overview of current status of 0.33 numerical aperture scanner and the infrastructure will be shared as well as the impact it has on the semiconductor industry. A next step in the EUV technology will be the realization of an 0.55 numerical aperture EUV scanner, a project well under way. After introduction of the first NA=0.55 scanner further innovations in scanner, mask and resist are foreseen, they will further reduce the “k1” factor and enable a continuation of shrinkage well into the next decade. A shift to smaller wavelength and/or larger numerical aperture are both being explored. They will come with significant technical and business challenges. Some of the key technical challenges presented as a challenge towards to litho community.

In the concept phase of EUV lithography much thought was spent on engineering the best multilayer mirror to achieve the optimal combination of wavelength and reflectivity. The EUV mask started its career in lithography as a commodity, benefitting from the mirror technology with an opaque layer carrying the pattern, for which Tantalum was a straightforward choice. The low NA of 0.25 and the technology nodes for 90nm pitch at the start of the EUV era, allowed the mask industry to drive the fabrication of the Ta-based EUV mask to perfection. As the understanding of the EUVL grew, its different components – e.g., resist, scanner optics, source - are being tailored to create the perfect aerial image and robust resist pattern. Since recent years, the attention is moving more and more to the EUV mask. Mask specific challenges involve mask deficiency induced stochastic failures, the anamorphicity of high-NA EUVL and mask 3D effects. Pellicle development and mask lifetime understanding are well progressing to control mask deficiency impact on wafer, and mask data prep software is being made aware to handle different mask reduction factors. Mask 3D effects, as a common denominator for inherent pitch- and orientation-dependent wafer observations, are identified to limit wafer performance for current and future technology nodes of 32nm pitch and below. Initial solutions are proposed by source-mask optimization, where the illumination and mask design are compensating these wafer effects, which are in fact due to the choice of the mask materials. At imec we started several years ago to target the mask material as the parameter to control the mask 3D effects on wafer. Our strategy towards a material down-selection for a mask technology change evolves on two levels, demonstrating improvements from lithographic perspective and validating compatibility with essential mask absorber requirements. Through simulations we mapped EUV n&k regions with their expected imaging benefit. Our simulation approach and material properties knowledge directed our engineering and characterization of novel absorber films. Various patterning strategies are investigated to ultimately validate the experimental imaging behavior to the simulation predictions. In this effort imec actively drives collaboration with suppliers, stakeholders, and institutes to explore the EUV mask space. The choice of EUV SPIE committee to have EUV mask as a keynote topic this year emphasizes that this mask material change is no longer a research matter, but a key enabler to fully exploit EUVL now and in the future.

While great advances have been made to move extreme ultraviolet (EUV) lithography toward manufacturing readiness, a difficult challenge remains. Although standard chemically amplified resists (CAR) can be exposed with EUV, these materials struggle to achieve resolution targets and are not nearly as sensitive as those created for ArF exposure. Non-CAR resists, such as metal-oxide resists, offer an alternative that achieve both EUV resolution and sensitivity targets. However, the inclusion of metal oxides poses a challenge to traditional filtration designed to remove unwanted dissolved contaminants from the fluid stream. Ultrahigh molecular weight polyethylene (UPE) filters have been used for metal oxide EUV resist filtration because of high retention efficiency and excellent photochemical compatibility. This paper describes our joint effort to improve Inpria metal oxide EUV resist defectivity usingfiltration optimization. A study comparing various Point-of-Use (POU) filters was conducted to identify filtration solutions that reduce defects in Inpria metal-oxide EUV resist coatings. Several filters utilizing a variety of retention ratings and membrane designs were installed on a TEL Clean TrackTM ActTM 12. A metal oxide EUV resist was filtered and coated on wafers that were subsequently analyzed for total wet particle counts. This study presents the efficacy of optimized filtration design to reduce defects in metal oxide EUV resists and provides a recommendation to achieve low wafer coating defects.

As target feature sizes for EUV lithography shrink, it is becoming ever more important to understand the intricate details of pattern formation in these materials. One such frontier that is garnering more attention is the role of the “third dimension" involved in the patterning process- the dimension perpendicular to the wafer. With resist thicknesses shrinking to accommodate ever narrower linewidths, small changes in resist performance in this dimension will have a greater overall effect on pattern quality, particularly as the thickness of these resists approaches target pattern dimensions. To understand the effect that the third dimension has on resist performance, and in particular the interplay between the third dimension and resist stochastics, we have developed a 3D version of the multivariate Poisson propagation model. As a test case for the model, we explore the role of acid diffusion in the so called third dimension on a set of 105 vias, showing that increased z blur yields an improvement in both dose to size and pattern uniformity without sacrificing resolution.

Low-energy electrons are released whenever ionizing high-energy radiation interacts with matter. They drive chemical reactions in the irradiated material, enable state-of-the art nanofabrication technologies such as focused electron beam induced deposition (FEBID), and contribute to the reactions of resist materials in extreme ultraviolet lithography (EUVL). This contribution presents fundamental research on the role of low-energy electrons in FEBID and EUVL. We discuss how reactions initiated by low-energy electrons can be exploited in FEBID to obtain metal-containing deposits with optimal purity. Regarding EUVL, the role of low-energy electrons in the conversion of an inorganic resist by EUV absorption has been investigated.