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Analysis of human movement is an important research area, specially for health applications. In order to assess the quality of life of people with mobility problems like Parkinson's disease (PD) or stroke patients, it is crucial to monitor their daily life activities. The main goal of this work is to characterize basic activities and their transitions using a single sensor located at the waist. This paper presents a novel postural detection algorithm which is able to detect and identify 6 different postural transitions, sit to stand, stand to sit, bending up/down and lying to sit and sit to lying transitions with a sensitivity of 86.5% and specificity of 95%. The algorithm has been tested on 31 healthy volunteers and 8 PD patients who performed a total of 545 and 176 transitions respectively. The proposed algorithm is suitable to be implemented in real-time systems for on-line monitoring applications.

User daily activity monitoring is useful for physicians in geriatrics and rehabilitation as a indicator of user health and mobility. Real time activities recognition by means of a processing node including a triaxial accelerometer sensor situated in the user's chest is the main goal for the presented experimental work. A two-phases procedure implementing features extraction from the raw signal and SVM-based classification has been designed for real time monitoring. The designed procedure showed an overall accuracy of 92% when recogninzing experimentation performed in daily conditions.

Traditional approaches to gas sensing are usually related with gas identification and classification, i.e., recognition of aromas. In this work we propose an innovative approach to determine the concentration of the single species in a gas mixture by using nonlinear source separation techniques. Additionally, responses of tin oxide sensor arrays were analyzed using nonlinear regression techniques to determine the concentrations of ammonia and acetone in gas mixtures. The use of the source separation approach allows the compensation of some of the most important sensor disadvantages: the parameter spreading and time drift.

Human learning over the Internet (e-learning) aims to improve both the availability of information and the performance of the students involved. Virtual laboratories are one form of e-learning in which students learn practical skills by carrying out practical work. Our work here discusses the impact of e-learning, virtual labs and intelligent tutoring systems in education. We also introduce a neural network e- lab, which has seve ral features that support active learning and assist the assessment of the students.

Large margin classifiers are computed to assign patterns to a class with high confidence. This strategy helps controlling the capacity of the learning device so good generalization is presumably achieved. Two recent examples of large margin classifiers are support vector learning machines (SVM) [12] and boosting classifiers[10]. In this paper we show that it is possible to compute large-margin maximum classifiers using a gradient-based learning based on a cost function directly connected with their average margin. We also prove that the use of this procedure in nearestneighbor (NN) classifiers induce solutions closely related to support vectors.

This paper will explain a systematic technique for the implementation of a synchronous circuit into the DRFPGA (dynamic reconfigurable FPGA) included in the FIPSOC devices, taking advantage of their properties of dynamic reconfiguration. The circuit to be implemented is partitioned using a set of temporal bipartitioning rules, and each partition is mapped on a separated context, sharing both contexts the same hardware resources. The time-multiplexed execution of both contexts constitutes a virtual circuit.

We present two online gradient learning algorithms to design condensed k-nearest neighbor (NN) classifiers. The goal of these learning procedures is to minimize a measure of performance closely related to the expected misclassification rate of the k-NN classifier. One possible implementation of the algorithm is given. Converge properties are analyzed and connections with other works are established. We compare these learning procedures with Kononen’s LVQ algorithms [7] and k-NN classification using the handwritten NIST databases [5]. Experimental results demonstrate the potential of the proposed learning algorithms.

Most partitioning algorithms have been developed for conventional programmable logic (especially FPGAs), being their main goal the minimisation of the signals constituting the interface (cutsize) between partitions, while balancing partition sizes. New families of dynamic reconfigurable programmable logic (DRPL) offer new possibilities to improve functional density of circuits, but traditional partitioning techniques are not able to exploit the novel features offered by these devices. A new family of partitioning techniques for DRPL should be developed, being its main goal the maximisation of the functional density on balanced partition sizes. This paper presents a new partitioning algorithm based on a temporal separation of the system functionality. As our experimental results will show, the algorithm is able to benefit from the dynamic reconfiguration properties of FPGA devices.

In this paper we address the problems posed when Artificial Neural Networks models are implemented in programmable digital hardware. Within this context, we shall especially emphasise the realisation of the arithmetic operators required by these models, since it constitutes the main constraint (due to the required amount of resources) found when they are to be translated into physical hardware. The dynamic reconfiguration properties (i.e., the possibility to change the functionality of the system in real time) of a new family of programmable devices called FIPSOC (Field Programmable System On a Chip) offer an efficient alternative (both in terms of area and speed) for implementing hardware accelerators. After presenting the data flow associated with a serial arithmetic unit, we shall show how its dynamic implementation in the FIPSOC device is able to outperform systems realised in conventional programmable devices.

In this paper we shall address the paradigms of evolutionary and self-repairing hardware using a new family of programmable devices, called FIPSOC (Field Programmable System On a Chip). The most salient feature of these devices is the integration on a single chip of a programmable digital section, a programmable analog section and a general-purpose microcontroller. Furthermore, the programmable digital section has been designed including a flexible and fast dynamic reconfiguration scheme. These properties provide an efficient framework for tackling the specific features posed by the emerging field of evolutionary computation. We shall demonstrate this fact by means of two different case studies: a self-repairing strategy for digital systems, suitable for applications in environments exposed to radiation, and an efficient implementation scheme for evolving parallel cellular machines.

In this paper we shall review the common problems associated with Piecewise Linear Separation incremental algorithms. This kind of neural models yield poor performances when dealing with some classification problems, due to the evolving schemes used to construct the resulting networks. So as to avoid this undesirable behavior we shall propose a modification criterion. It is based upon the definition of a function which will provide information about the quality of the network growth process during the learning phase. This function is evaluated periodically as the network structure evolves, and will permit, as we shall show through exhaustive benchmarks, to considerably improve the performance (measured in terms of network complexity and generalization capabilities) offered by the networks generated by these incremental models.

In this paper we shall present a general methodology to be used when artificial neural network models are applied to solve real tasks in industrial environments. This methodology will be outlined by means of a case study which consists in the implementation of the decision/classification engine to be included in an automatic coin classifier. This coin classifier is incorporated in commercial vending machines, so that the problems arising when trying to face the conditions imposed by real environments have to be considered. The methodology presented in this paper can be considered as divided in three main tasks: database compilation and analysis, selection of the proper neural model and its implementation. A wide range of neural models, including classical as well as evolutive algorithms, has been considered. As the experimental results provided show, the use of artificial neural models for implementing the proposed classifier proves to overcome some of the limitations inherent to the traditional techniques considered when solving this task.

The design process of an 8-bit 32-processing-units serial pipeline VLSI modular processor performing the parallel execution of a kernel classifier recall phase is described. Starting from VHDL high-level modelling, after verifying the correct circuit behaviour by means of digital simulation, the circuit has been synthesized and mapped on a 0.7 micron CMOS technology. Both area and delay optimized syntheses are performed for each processor cell, selecting in each case the best solution. Taking advantage of the constant data flow of the pipeline architecture, a dynamic realization of the memory elements using tri-state standard cells is proposed. This reduces both the circuit area and delays, without losing the convenience of an automatic standard cell placement and routing. From synthesis results, a working frequency of about 300 MHz is expected. A parallel-serial interface reduces external clock frequency requirements, and thus matching the external frequency limitations with fast on-chip processing.

An analog sequential architecture for efficient neuro-fuzzy models implementation is proposed. The best features of digital and analog domains are combined to provide a high degree of flexibility (in terms of number of inputs, number of membership functions per input and number of fuzzy rules) when handling real world tasks. The performance estimations show a good area/throughput ratio, thus making the architecture suitable for a wide range of applications.

In this paper we address the problem of constructing efficient hardware solutions for Region of influence (ROI) incremental algorithms. First we shall review the main features associated with these neural models, paying special attention to the basic operations required in order to fulfil the data flow imposed by their training and recall phases. Taking into account the resource organization demanded by this data flow, we shall propose an efficient digital realization which is capable to convert into a physical implementation the organization principles stated previously. The proposed realization is composed of a bidimensional array of processing units, which have been developed as RISC processors. After explaining the emulation sequence to be used for ROI incremental models on the proposed realization, we evaluate the performance (measured in terms of processing speed) attainable by the system when real world classification tasks have to be handled. Our results shown that the proposed realization considerably outperforms recent commercial developments.

In this article we present a coprocessor card for PC, designed for the fast emulation of neural network-based systems. The card is composed of 6 custom neural processors arranged using a special parallel architecture. The processor is briefly presented and the structure of the card discussed, along with the architecture's basics. Also presented are the software tools developed around the card, the graphical interface used for drawing the net and the compiler used to translate the drawing into a series of instructions understood by the processor. Last, we present some results regarding a sample application in which the card was tried: in the control of an inverted pendulum.

Two different approaches in constructing Neural Network (NN) classifiers are discussed — discriminant-based networks and Region of Influence networks. A general model for ROI networks is presented, and the different functionalities of this structure are discussed: classification, vector quantization and associative memory.

In this paper we address the problems which may appear when using the classical Perceptron or Pocket algorithms in order to train the units generated by Piecewise Linear Separation (PLS) incremental algorithms. These problems are due to the type of optimal solutions found by such training algorithms. Some of these solutions force a useless separation of input data, resulting in that the new units added to the network by the incremental algorithm are again faced with the same problem. The final network would then be composed of a large number of redundant units, each of them trying to solve exactly the same problem and arriving at exactly the same solution. We review some modifications proposed for improving the training algorithms, which are mainly based on the evaluation of entropy-like functions calculated for the input distributions. Furthermore, an alternative solution is proposed which has the advantage of the low computational cost associated to it. This method compares well, as simulation results show, with the methods based on Information Theory concepts.

A nonlinear compartmental model is developed for the HIV detection system in Cuba with different types of detections, some random and others non-random. We analyze the dynamics of this system, compute the reproduction numbers, and use the data from the Cuban HIV/AIDS epidemic between 1986-2008 to fit the model. We obtain estimates for the detection-related parameters during two separate time periods to reflect the timeline of the implementation of various types of searches. The reproduction numbers for each time period are also computed from the sets of values of the parameters. We found that random screening is most important as a mean of surveillance. Moreover, local asymptotic stability for the Disease Free Equilibrium can be achieved if (i) random screening is sufficiently effective and (ii) infection by detected HIV-positive individuals is minimal. Our results highlight the importance of education for the known infectious for the purpose of preventing further infection. Fitting the 1986-2008 HIV data to obtain the model parameter estimates indicates that the HIV epidemic in Cuba is currently approaching an endemic equilibrium. A Genetic Algorithm is used.

The present paper aims at locating the breakings of the integration process of an international system observed during about 50 years in the 19th century. A historical study could link them to special events, which operated as exogenous shocks on this process. The indicator of integration used is the spread between the highest and the lowest among the London, Hamburg and Paris gold-silver prices. Three algorithms are combined to study this integration: a periodization obtained with the SOM algorithm is confronted to the estimation of a two-regime Markov switching model, in order to give an interpretation of the changes of regime; in the same time change-points are identified over the whole period providing a more precise interpretation of the various types of regulation.