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As gallium oxide-based heterojunction devices gain prominence, low-resistance contacts to aluminum gallium oxide material are of increasing importance for high performance and access to modulation doped layers. Here, the activation of ion-implanted silicon donors is investigated as a function of donor density from 5 × 1018 cm−3 to 1 × 1020 cm−3, activation anneal duration from 6 s to 600 s, and activation temperature from 900°C to 1140°C. Importantly, ohmic behavior was achievable across a reasonably wide process window at moderate to high doping concentrations. Specific contact resistance of 1 × 10−3 Ω cm2 and sheet resistance of 2.8 kΩ/□ were achieved for a 60 nm-deep 1 × 1020 cm−3 box implant after activation at 1000°C for 6 s with standard Ti/Au contacts. Under these conditions, an activation efficiency of 7% was observed with Hall mobility of ~32 cm2/Vs. Furthermore, we demonstrate a Schottky diode formed of implanted material with a rectification ratio > 106 and further confirm the Hall carrier density results using capacitance–voltage profiling analysis. Finally, we show the significant impact of anneal duration and the potential for deleterious over-annealing which reduces the active carrier density, mobility, and resultant material conductivity. [ABSTRACT FROM AUTHOR]

Platinum oxide (PtOx) Schottky contacts on degenerately doped β-Ga2O3 substrates show an increased barrier height of 85% and 64% when compared to nickel and platinum Schottky contacts, respectively. At low reverse voltage bias, the reverse leakage current of the PtOx Schottky barrier diodes was approximately 5–6 orders of magnitude lower than the reference evaporated Ni and Pt Schottky contacts. PtOx Schottky contacts were deposited using reactive sputtering on highly doped (8 × 1018 cm−3) ( 2 ¯ 01 ) β-Ga2O3:Sn substrates grown by the edge-defined film-fed growth (EFG) method. All Schottky metals were capped with evaporated Au. Capacitance–voltage and temperature-dependent current–voltage measurements were performed in order to extract the barrier height of the PtOx Schottky contact. Analysis of the diode ideality factors reveal that the PtOx Schottky contacts on highly doped β-Ga2O3 do not follow the thermionic field emission model and are impacted by inhomogeneous barrier height distribution. This work highlights the significance of PtOx Schottky contacts for β-Ga2O3-based power devices as a means for reducing leakage current. This work also holds relevance for low-voltage applications, where Schottky contacts for degenerately doped semiconductors can enable new electronic device applications. [ABSTRACT FROM AUTHOR]

Semiconductor wafer manufacturing relies on the precise control of various performance metrics to ensure the quality and reliability of integrated circuits. In particular, GaN has properties that are advantageous for high voltage and high frequency power devices; however, defects in the substrate growth and manufacturing are preventing vertical devices from performing optimally. This paper explores the application of machine learning techniques utilizing data obtained from optical profilometry as input variables to predict the probability of a wafer meeting performance metrics, specifically the breakdown voltage (Vbk). By incorporating machine learning techniques, it is possible to reliably predict performance metrics that cause devices to fail at low voltage. For diodes that fail at a higher (but still below theoretical) breakdown voltage, alternative inspection methods or a combination of several experimental techniques may be necessary. [ABSTRACT FROM AUTHOR]

To improve the manufacturing process of GaN wafers, inexpensive wafer screening techniques are required to both provide feedback to the manufacturing process and prevent fabrication on low quality or defective wafers, thus reducing costs resulting from wasted processing effort. Many of the wafer scale characterization techniques—including optical profilometry—produce difficult to interpret results, while models using classical programming techniques require laborious translation of the human-generated data interpretation methodology. Alternatively, machine learning techniques are effective at producing such models if sufficient data is available. For this research project, we fabricated over 6000 vertical PiN GaN diodes across 10 wafers. Using low resolution wafer scale optical profilometry data taken before fabrication, we successfully trained four different machine learning models. All models predict device pass and fail with 70–75% accuracy, and the wafer yield can be predicted within 15% error on the majority of wafers. [ABSTRACT FROM AUTHOR]

To improve the manufacturing of vertical GaN devices for power electronics applications, the effects of defects in GaN substrates need to be better understood. Many non-destructive techniques including photoluminescence, Raman spectroscopy and optical profilometry, can be used to detect defects in the substrate and epitaxial layers. Raman spectroscopy was used to identify points of high crystal stress and non-uniform conductivity in a substrate, while optical profilometry was used to identify bumps and pits in a substrate which could cause catastrophic device failures. The effect of the defects was studied using vertical P-i-N diodes with a single zone junction termination extention (JTE) edge termination and isolation, which were formed via nitrogen implantation. Diodes were fabricated on and off of sample abnormalities to study their effects. From electrical measurements, it was discovered that the devices could consistently block voltages over 1000 V (near the theoretical value of the epitaxial layer design), and the forward bias behavior could consistently produce on-resistance below 2 mΩ cm2, which is an excellent value considering DC biasing was used and no substrate thinning was performed. It was found that high crystal stress increased the probability of device failure from 6 to 20%, while an inhomogeneous carrier concentration had little effect on reverse bias behavior, and slightly (~ 3%) increased the on-resistance (Ron). Optical profilometry was able to detect regions of high surface roughness, bumps, and pits; in which, the majority of the defects detected were benign. However a large bump in the termination region of the JTE or a deep pit can induce a low voltage catastrophic failure, and increased crystal stress detected by the Raman correlated to the optical profilometry with associated surface topography. [ABSTRACT FROM AUTHOR]

In light of the importance of selective area doping in GaN to enable planar process technology, and to avoid the complications from the etch/regrowth process, ion implantation is the recognizable alternative. Annealing to activate dopant species and repair the damage to a crystal poses a challenge for GaN since the material will decompose to Ga + N2 at atmospheric pressure and relevant temperatures. In this research, in situ high- and low-temperature epitaxial and ex situ sputtered AlN caps were examined in different stacking arrangements to study the optimum conditions for Mg ion implantation and activation. Concurrently, a matrix of different implantation doses was also investigated to better understand the dose-dependent activation. Each sample has a unique cap stack and four different implant doses, including an unimplanted reference quadrant. The results show that poorer quality cap films enable nitrogen to leave the crystal during annealing and leave nitrogen vacancies behind. Furthermore, a high dose is needed at the surface to facilitate ohmic contact formation. The results suggest that in situ epitaxial-grown AlN caps are more suitable for GaN activation annealing, and high-temperature thin caps provide the best barrier to prevent crystal disintegration. We reveal a timely strategy for preserving the quality of GaN crystal structure during the electrical activation of the ion-implanted Mg atoms. This work provides valuable information that bridges the gap between device processing and electrical characterization of GaN devices, presenting a clear path towards achieving an electrical activation of implanted Mg while maintaining the integrity of the crystalline structure of GaN. [ABSTRACT FROM AUTHOR]

Present GaN technology consists primarily of heteroepitaxial, lateral high electron mobility transistors; however, high-power devices would be much more efficiently manufactured with a vertical geometry due to better blocking voltage scaling. This technology has yet to be realized due to the inconsistency of GaN wafer properties. These inconsistencies can be detected with several long-range, non-destructive techniques including Raman spectroscopy, optical profilometry, and photoluminescence mapping. In particular, Raman spectroscopy is an effective tool for determining the carrier concentration of GaN substrates and whether the wafers are uniform or inhomogeneous. In this work, vertical p-i-n GaN diodes are fabricated using both uniform and inhomogeneous wafers determined by using the A1 Raman peak position to monitor carrier concentration. The inhomogeneous samples have regular patterns of varying conductivity as a result of electron-donating defects brought about by changes in crystal stress. By avoiding these defects, we have found that diode performance improves by increasing the +/− 10 V rectification ratio by up to a factor of 5X and reducing the 200 V reverse bias leakage current by several orders of magnitude. Using the higher quality substrates with uniform electron carrier concentrations can improve the rectification ratio by another order of magnitude. [ABSTRACT FROM AUTHOR]