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Your search keyword '"Rodrigues, Joachim"' showing total 3 results
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3 results on '"Rodrigues, Joachim"'

1. A continuous-time delta-sigma ADC with integrated digital background calibration.

Author

Tan, Siyu, Miao, Yun, Palm, Mattias, Rodrigues, Joachim, and Andreani, Pietro

Subjects
CALIBRATION, CONTINUOUS time systems, DELTA-sigma modulation, ANALOG-to-digital converters, COMPLEMENTARY metal oxide semiconductors, SIGNAL-to-noise ratio
Abstract

This work presents a digital calibration technique in continuous-time (CT) delta-sigma ( $$\Delta \Sigma$$ ) analog to digital converter. The converter is clocked at 144 MHz with a low oversampling ratio (OSR) of only 8. Dynamic element matching is not efficient to linearize the digital to analog converter (DAC) when the OSR is very low. Therefore, non-idealities in the outermost multi-bit feedback DAC are measured and then removed in the background by a digital circuit. A third-order, four-bit feedback, single-loop CT $$\Delta \Sigma$$ converter with digital background calibration circuit has been designed, simulated and implemented in 65 nm CMOS process. The maximum simulated signal-to-noise and distortion ratio is 67.1 dB within 9 MHz bandwidth. [ABSTRACT FROM AUTHOR]

Published
2016
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3. Energy Dissipation Reduction of a Cardiac Event Detector in the Sub-V t Domain By Architectural Folding.

Author

Rodrigues, Joachim Neves, Akgun, Omer Can, Acharya, Puneet, de la Calle, Adolfo, Leblebici, Yusuf, and Öwall, Viktor

Abstract

This manuscript presents the digital hardware realization of a wavelet based event detector for cardiac pacemaker applications. The architecture of the detector is partially folded to minimize hardware cost. An energy model is applied to evaluate the energy efficiency in the sub-threshold (sub-VT) domain. The design is synthesized in 65 nm low leakage-high threshold CMOS technology, and it is shown that folding reduces the area cost by 30.6 %. Folding decreases energy dissipation of the circuit by 14.4 % in the sub-VT regime, where the circuit dissipates 3.3 pJ per sample at VDD=0.26 V. [ABSTRACT FROM AUTHOR]

Published
2010
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