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The hyperspectral image provides rich spectral information content, which facilitates multiple applications. With the rapid advancement of the spatial and spectral resolution of optical instruments, the image data size has increased by many folds. For that, it requires a compression algorithm having low coding complexity, low coding memory demand and high coding efficiency. In recent years, many coding algorithms are proposed. The wavelet transform-based set-partitioned hyperspectral compression algorithms have superior coding performance. These algorithms employ linked lists or state tables to track the significant/insignificant of the partitioned sets/coefficients. The proposed algorithm uses the pyramid hierarchy property of wavelet transform. The markers are used to track the significance/insignificance of the pyramid level. A single pyramid level has many sets. An insignificant pyramid level having multiple sets is represented as a single bit in proposed compression algorithm, while a single insignificant set in 3D Set Partition Embedded bloCK (3D-SPECK) and 3D-Listless SPECK (3D-LSK) is represented as a single bit. Through this, the requirement of the bits in the proposed algorithm is less than other wavelet transform compression algorithms at the high bit planes. The simulation result shows that the proposed compression algorithm has high coding efficiency with very less coding complexity and moderate coding memory requirement. The reduced coding complexity improves the performance of the image sensor and lowers the power consumption. Thus, the proposed compression algorithm has great potential in low-resource onboard hyperspectral imaging systems. [ABSTRACT FROM AUTHOR]

To reduce the hardware implementation resource consumption of the two-dimensional transform component in H.266 VVC, a unified hardware structure is proposed that supports full-size Discrete Cosine Transform (DCT), Discrete Sine Transform (DST), and full-size Low-Frequency Non-Separable Transform (LFNST). This paper presents an area-efficient hardware architecture for two-dimensional transforms based on a general Regular Multiplier (RM) and a high-throughput hardware design for LFNST in the context of H.266/VVC. The first approach utilizes the high-frequency zeroing characteristics of VVC and the symmetric properties of the DCT-II matrix, allowing the RM-based architecture to use only 256 general multipliers in a fully pipelined structure with a parallelism of 16. The second approach optimizes the transpose operation of the input matrix for LFNST in a parallelism of 16 architecture, aiming to save storage and logic resources. [ABSTRACT FROM AUTHOR]

Versatile video coding standard known as H.266/VVC has been adopted by the Joint Video Experts Team in July 2020 Bross et al. (ITU-T and ISO/IEC JVET-S2001, 2020). It is the latest video coding standard with advanced tools to enhance coding efficiency. Notably, H.266/VVC introduces new techniques, including Multiple Transform Selection (MTS). In this paper, detailed descriptions of the new transform coding development in VVC standard are presented. The study also highlights the impact of the MTS on the VVC encoder performance through experimental research using VVC reference software VTM-14 for random access configuration. The experimental results show an increase of 8.35% in terms of time execution with an improvement of 1% in the quality of the reconstructed video along with a reduction of 1% in bitrate for a quantification parameter QP equal to 32. For a QP equal to 22, there is an increase of 15.8% in terms of time execution with an improvement of 0.056% in the quality of the reconstructed video along with a reduction of 0.445% in bitrate. [ABSTRACT FROM AUTHOR]

This paper explores learned image compression based on traditional and learned discrete wavelet transform (DWT) architectures and learned entropy models for coding DWT subband coefficients. A learned DWT is obtained through the lifting scheme with learned nonlinear predict and update filters. Several learned entropy models, with varying computational complexities, are explored to exploit inter- and intra-DWT subband coefficient dependencies, akin to traditional EZW, SPIHT, or EBCOT algorithms. Experimental results show that when the explored learned entropy models are combined with traditional wavelet filters, such as the CDF 9/7 filters, compression performance that far exceeds that of JPEG2000 can be achieved. When the learned entropy models are combined with the learned DWT, compression performance increases further. The computations in the learned DWT and all entropy models, except one, can be simply parallelized, and thus, the systems provide practical encoding and decoding times on GPUs, unlike other DWT-based learned compression systems in the literature. [ABSTRACT FROM AUTHOR]

The 3D-zero memory set partitioned embedded block (3D-ZM-SPECK) is an embedded and memory-efficient compression algorithm. Through, the 3D-ZM-SPECK does not require any coding memory, but testing of the sets for each bit-plane increases the complexity significantly which led a big constrain for the low resource HS image sensors. The proposed HS image compression algorithm is the low complexity solution of 3D-ZM-SPECK which reduces the recursive significance test of sets. Simulation results demonstrate that the proposed 3D-M-ZM-SPECK significantly reduces the complexity by ~ 25% with the other state of art HS image compression algorithms. Thus, it is a viable option for the HS image sensors. [ABSTRACT FROM AUTHOR]

Hyperspectral image sensors are resource constrained and have limited on-board memory. Processing of high volume hyperspectral images pose a challenge to the memory and resources of the sensor. Contemporary wavelet based image compression schemes have intensive memory requirement of which 3D-WBTC have superior coding performance due to through the exploitation of the inter sub-band & intra sub-band redundancy. This paper presents a low memory implementation of 3D-WBTC which is a listless scheme by using the fixed size state memory to keep track of block set partitioning and significance testing of wavelet coefficients of transformed hyperspectral images. Memory access time is significantly reduced due to the elimination of lists that leads to reduced complexity. Simulation results of the proposed scheme shows that proposed coder is fast and have very low memory requirement thereby making it a suitable candidate for implementation in resource constrained hyper spectral image sensor. [ABSTRACT FROM AUTHOR]

Optimum nonnegative integer bit allocation (ONIBA) is a conspicuous technique, which usually provides the solution of optimal quantization issues for the transform coders (TCs). In order to obtain the optimum bits for a specific quantizer, all the existing ONIBA algorithms strongly rely on the variance characteristics of transform coefficients. Typically, in the wavelet-based TCs, the sub-band variances are directly estimated in the wavelet domain. This direct variance estimation is not supposed to be the best way to obtain the exact variance information, because the practical values of the wavelet coefficients may not be precise and therefore constitute an uncertain environment for the accurate variance estimation. Consequently, all the existing ONIBA algorithms often exhibit poor quantization performance in the presence of entropy coder. Hence, this paper presents a new fuzzy domain variance estimation and refinement (FDVER)-based ONIBA algorithm to attain the real optimum quantization of the wavelet coefficients in the presence of entropy coder. The outcome shows that the proposed FDVER-ONIBA algorithm outperforms and provides high-quality image compression along with the significant bitrate savings by the efficient quantization of the wavelet coefficients as compared to the existing common sub-band coding technique and the recent ONIBA algorithms. [ABSTRACT FROM AUTHOR]

The major challenge with multimedia communication lies in the demand for higher data rates with better quality of service and lower latency over the wireless channel. Multimedia content is usually source encoded with variable length codes (VLCs) for optimizing bandwidth utilization. VLCs, even though uniquely decodable, suffer from the problem of error propagation. A single bit error can cause an entire block of data to be decoded wrongly, because the ending of a codeword and the beginning of the next can no longer be determined correctly. Several joint source-channel coding (JSCC) techniques are studied in literature to have efficient source coding with resilience to channel errors, but such methods pose a prohibitively high computational complexity. A variant of JSCC for efficient transmission of information is presented in this paper. The information text is encoded by reversible VLC (RVLC) and corresponding to it, a header sequence is generated. Since the headers are critical in decoding a block, they are channel coded with convolution code to protect from errors. Orthogonal frequency division multiplexing is used to provide high data rate communication and robustness to multipath fading. The performance of the system is analysed over Rayleigh fading channel in terms letter error rate (LER) and computational complexity. The proposed method is seen to provide a good LER performance at moderate to high signal to noise ratio, along with minimal computational complexity, when compared with the contemporary JSCC based schemes. Theoretical performance bounds for the error rate of the proposed system are also derived. [ABSTRACT FROM AUTHOR]

Consider communicating a correlated Gaussian source over a Rayleigh fading channel with no knowledge of the channel signal-to-noise ratio (CSNR) at the transmitter. In this case, a digital system cannot be optimal for a range of CSNRs. Analog transmission however is optimal at all CSNRs, if the source and channel are memoryless and bandwidth matched. This paper presents new hybrid digital-analog (HDA) systems for sources with memory and channels with bandwidth expansion, which outperform both digital-only and analog-only systems over a wide range of CSNRs. The digital part is either a predictive quantizer or a transform code, used to achieve a coding gain. Analog part uses linear encoding to transmit the quantization error which improves the performance under CSNR variations. The hybrid encoder is optimized to achieve the minimum AMMSE (average minimum mean square error) over the CSNR distribution. To this end, analytical expressions are derived for the AMMSE of asymptotically optimal systems. It is shown that the outage CSNR of the channel code and the analog-digital power allocation must be jointly optimized to achieve the minimum AMMSE. In the case of HDA predictive quantization, a simple algorithm is presented to solve the optimization problem. Experimental results are presented for both Gauss-Markov sources and speech signals. [ABSTRACT FROM AUTHOR]

In spite of high decorrelation performance, the large block size of transform coding in High Efficiency Video Coding (HEVC) brings about undesirable complexity in hardware design. The heaviest burden in HEVC transform implementation is the large quantity of multiplications. In this paper, we propose a novel hierarchical multiplier-free architecture for HEVC transform, which can achieve a multiplier-free partial butterfly combined with matrix multiplications (PBMM) architecture based on vector decomposition (VD-PBMM). In the proposed architecture, the complicate matrix multiplication in PBMM is achieved by several simple stages to simplify its VLSI realization. Each stage only involves additions and multiplications with power of two which can be achieved by shifters and adders. In addition, the new architecture can balance the distribution of adders to improve the system frequency. The proposed architecture has been evaluated with TSMC 0.13um CMOS technology. The relative system can run at 400 MHz with 92 K logic gates, which is about half of the PBMM method when the latency is 8. The proposed architecture can achieve the transform without any performance loss compared with the standard, and it is suitable for the hardware implementation in VLSI design. [ABSTRACT FROM AUTHOR]

Three dimensional nature of hyperspectral data with huge amount of correlation in spatial and spectral domain makes transform coding methods more efficient for compression. Transform methods concentrate signal power in a few coefficients resulting in better low bit rate performance with low computational complexity. A set of 3D hybrid transforms obtained by combining various 1D spectral decorrelator and 2D spatial decorrelator are investigated for their performance evaluation. Wavelet-based methods generate clustered coefficients having parent-child relationship between the subbands. This property can be exploited by entropy encoders to generate bit streams. For entropy encoding, various 2D-set partitioning methods are studied. 2D-set partitioning in hierarchical trees and 2D-tree block encoding exploit parent-child relationship, and 2D-set partitioning in embedded blocks exploits spatial correlation between neighboring pixels within the sub-band in space and frequency of transformed band images. 2D-set partitioning in blocks of hierarchical trees (2D-SPBHT) exploits energy clustering as well as tree structure of wavelet transform simultaneously. It is shown that 2D-SPBHT provides better performance at all the bitrates as compared to other 2D-set partitioning methods irrespective of the 3D transformation used. [ABSTRACT FROM AUTHOR]

Traditional video coding uses classical predictive coding techniques, where a signal is initially approximated by taking advantage of the various redundancies present. Most of the video coding standards, including the latest HEVC, use the well-accepted procedure of applying transform coding on self-contained (intra) and inter-predicted frame residuals. Nevertheless, it has been shown in the literature that, a normal video frames possess distinct characteristics compared to a residual frame. In this paper, we have made use of hybrid wavelet transforms and directional filter banks (HWD) to encode resolution enhancement residuals in the context of scalable video coding. The results are presented for the use of HWD in the framework of the Dirac video codec. The experiments are carried out on a variety of test frames. Our experiments on residue coding using HWD show better performance compared to the conventional DWT, when tested on the same platform of the well-known SPIHT algorithm. [ABSTRACT FROM AUTHOR]

Karhunen-Loève transform (KLT) is the optimal transform that minimizes distortion at a given bit allocation for Gaussian source. As a KLT matrix usually contains non-integers, integer-KLT design is a classical problem. In this paper, a joint reversibility-gain (R-G) model is proposed for integer-KLT design in video coding. Specifically, the 'reversibility' is modeled according to distortion analysis in using forward and inverse integer transform without quantization. It not only measures how invertible a transform is, but also bounds the distortion introduced by the non-orthonormal integer transform process. The 'gain' means transform coding gain (TCG), which is a widely used criterion for transform design in video coding. Since KLT maximizes the TCG under some assumptions, here we define the TCG loss ratio (LR) to measure how much coding gain an integer-KLT loses when compared with the original KLT. Thus, the R-G model can be explained as follows: subject to a certain TCG LR, an integer- KLT with the best reversibility is the optimal integer transform for a given non-integer-KLT. Experimental results show that the R-G model can guide the design of integer-KLTs with good performance. [ABSTRACT FROM AUTHOR]

We design a computer vision-based localization and tracking method to cope with the wide area registration problem in mobile AR applications. To get an efficient wide area localization system, we design a fast and compact key frame search algorithm using the modified vector of locally aggregated descriptors and the improved transform coding-based approximate nearest neighbor search approach. While providing reasonable search accuracy, the proposed algorithm can also reduce the memory usage on mobile phones significantly. To get a real-time registration system, we use a flexible camera initialization and tracking method. The method can track non-planar scenes at frame rates of up to 10 Hz on current generation phones and facilitate the registration process of wide area mobile AR applications to a large degree. Some results are discussed to prove the effectiveness of the proposed localization and tracking method for wide area mobile AR applications. [ABSTRACT FROM AUTHOR]

In the era of big data, the gap between the fast increasing size of the surveillance video data and the relatively stable video compression rate has become prominent. Existing data compression methods based on the known redundancies are not able to eliminate the dominant redundancy embedded in the big surveillance video data (BSVD) of multiple sources in large time span. In this study, a new approach based on global redundancy of the BSVD has been explored. We first analyze the compositions of the global redundancy based on characteristics of BSVD. A coding framework is proposed to eliminate global redundancy. Simulated experiments have been performed to examine the performance of the approach in comparison with the high efficiency video coding. The experimental result showed that the proposed approach can reach a compression rate of 1/400 for a huge dataset of surveillance videos. [ABSTRACT FROM AUTHOR]

This paper proposes an efficient joint implementation algorithm for computing color space conversion, quantization and discrete cosine transform (DCT) in an image coder/decoder. By combining the three stages, the proposed algorithm reduces the operation amount of computing color space conversion considerably. In the case of color sampling 4:4:4, the proposed algorithm reduces the multiplication amount by 40% and the addition amount by 42% for the conversion from RGB to YCbCr in an image coder, and reduces the multiplication amount by 60% and the addition amount by 42% for the conversion from YCbCr to RGB in an image decoder. In the cases of down-sampling 4:2:2 and 4:1:1, there are the similar results. The existing fast methods in the literatures can still be applied together with this proposed algorithm into the implementation of the international image coding standards which use the transform coding technology, such as JPEG, MPEG and H.26X, and raises the image coding/decoding speed efficiently. [ABSTRACT FROM AUTHOR]

This paper presents an ASIC processor chip for real-time implementation of the computing of the complete process of forward transform, quantization, inverse transform, dequantization, and reconstruction of a 16 × 16 macroblock in full compliance with the H.264/AVC video coding standard. This processor is capable of processing 4 × 4 blocks without interruption, with a parallelism in the data-path of 16 data/cycle, in a pipeline architecture with the twofold aim of achieving high operation frequency and high throughput. To implement the four 4 × 4 transforms and two 2 × 2 transforms required in the H.264/AVC coding system, two configurable multitransform direct 2-D architectures are used, one for forward and another for inverse. Moreover, a reduction in hardware is achieved by reformulating of quantization and dequantization equations and appropriately adjusting the datapath bus widths. A prototype of this processor chip was fabricated in the HCMOS9 STMicroelectronics 130 nm standard cell technology. The latency for 16 × 16 macroblocks is 26 clock cycles in normal mode and 42 in Intra 16 × 16 mode with a maximum operating frequency of 280 MHz and a throughput of 4,480 Mpixels/s. As a result, our processor chip is able to support the UHDTV 7680 × 4320@60 Hz (3 G sample/s) format requirement. [ABSTRACT FROM AUTHOR]

This paper proposes a complete compression and coding scheme for on-board satellite applications considering the main on-board constraints: low computational power and easy bit rate control. The proposed coding scheme improves the performance of the current Consultative Committee for Space Data Systems (CCSDS) recommendation for a low additional complexity. We consider post-transforms in the wavelet domain, select the best representation for each block of wavelet coefficients, and encode it into an embedded bit stream. After applying a classical wavelet transform of the image, several concurrent representations of blocks of wavelet coefficients are generated. The best representations are then selected according to a rate-distortion criterion. Finally, a specific bit-plane encoder derived from the CCSDS recommendation produces an embedded bit stream ensuring the easy rate control required. In this article, both the post-transforms and the best representation selection have been adapted to the low complexity constraint, and the CCSDS coder has been modified to compress post-transformed representations. [ABSTRACT FROM AUTHOR]

Many important developments in video compression technologies have occurred during the past two decades. The block-based discrete cosine transform with motion compensation hybrid coding scheme has been widely employed by most available video coding standards, notably the ITU-T H.26 x and ISO/IEC MPEG- x families and video part of China audio video coding standard (AVS). The objective of this paper is to provide a review of the developments of the four basic building blocks of hybrid coding scheme, namely predictive coding, transform coding, quantization and entropy coding, and give theoretical analyses and summaries of the technological advancements. We further analyze the development trends and perspectives of video compression, highlighting problems and research directions. [ABSTRACT FROM AUTHOR]

Stream processors can achieve high performance in stream applications that share stream characteristics of large parallelism, intensive computation and little data reuse. Transform coding, as a core component in video compression, is widely used in video storage and video transmission. This paper summarizes stream execution mechanism and explores design approaches of programmable stream processors including the Imagine stream processor and graphics processing unit (GPU). Based on the stream processing model, stream algorithms for block-based and frame-based (nonblock-based) transform coding are presented and mapped onto stream processors. Especially, an Interleaved Streaming Transform (IST) algorithm on Imagine and a Row-wise Zonal Transform (RZT) algorithm on GPU for 4×4 integer transform in H.264 are proposed to exploit great potential of stream processing for block-based transform. Our experiments of transform coding suite on Imagine and GPU show that the coding efficiency of stream processors is far beyond the real-time requirements of current video applications, dealing with a variety of different video resolutions ranging from QCIF to high definition (HD). The performance evaluation of stream implementations discusses the architectural supports for transform coding, and presents the significant improvements over other programmable platforms. Transform coding may take advantage of the flexibility of programmable stream processors with high performance to play an important role in the future. [ABSTRACT FROM AUTHOR]

In this paper, image data compression methods based on sample selection in the piecewise-linear transform domain will be presented. The image is subjected to a 2-dimensional piecewise-linear transformation and some coefficients will be selected using threshold method and a proposed zonal sampling method. In the proposed zonal sampling method all samples outside the selected zone will be discarded completely (no zeros are replaced). The inverse transformation in this case will have a dimension equal to that of the selected zone. Thus the number of computations needed for the inverse transformation is reduced. The Peak Signal-to-Noise Ratio (PSNR) is used as a measure of quality of the reconstructed images. Comparisons of the compression ability using piecewise-linear transforms and some selected orthogonal transforms such as Walsh and cosine transforms are given. The results obtained by using the proposed zonal sampling method show that the piecewise-linear transforms have a better performance than the orthogonal transforms. [ABSTRACT FROM AUTHOR]

A two stage hybrid embedded speech/audio coding structure and algorithm are proposed. The first stage of the structure consists of a core speech coder which provides a minimum output bit rate and acceptable performance on clean speech inputs. The second stage is a perceptual/transform based coder which provides a separate optional bitstream for the enhancement of the core stage output. The two stage structure can be used to enhance the quality of an existing codec without modification of the original coding algorithm. In this regard it can be considered a value added option that can be used with a standard (existing) system. The structure can also be used in systems in which many users/systems force the coding algorithm to work simultaneously under multiple constraints of bitrate, complexity, delay, and coding quality. Informal testing of the algorithm has been done using ITU-T standard G.723.1 at 5.3 kb/s as a core coder. The maximum combined bitrate from the core and enhancement stages for the tests is 16 kb/s. The tests show that the second stage significantly improves the quality of the core output in the cases of music and speech with background noise. Compared to the non-embedded fixed rate standard LD-CELP G.728 at 16 kb/s, the quality of the two stage structure is generally lower on these inputs; the embedded feature does affect quality. On clean speech the quality of the two stage structure at 16 kb/s is close to if not better than that of G.728 at 16 kb/s. [ABSTRACT FROM AUTHOR]

Envisioned advanced multimedia video services include arbitrarily shaped (AS) image segments as well as regular rectangular images. Image segments of the TV weather report produced by the chromo-key technique [1] and image segments produced by video analysis and image segmentation [2-4] are typical examples of AS image segments. This paper explores efficient intraframe transform coding techniques for general two-dimensional (2D) AS image segments, treating the traditional rectangular images as a special case. In particular, we focus on the transform coding of the partially defined image blocks along the boundary of the AS image segments. We recognize two different approaches - the brute force transform coding approach and the shape-adaptive transform coding approach. The former fills the uncovered area with the optimal redundant data such that the resulting transform spectrum is compact. A simple but efficient mirror image extension technique is proposed. Once augmented into full image blocks, these boundary blocks can be processed by traditional block-based transform techniques like the popular discrete cosine transform (DCT). In the second approach, we change either the transform basis or the coefficient calculation process adaptively based on the shape of the AS image segment. We propose an efficient shape-projected problem formulation to reduce the dimension of the problem. Existing coding algorithms, such as the orthogonal transform by Gilge [5] and the iterative coding by Kaup and Aach [6], can be interpreted intuitively. We also propose a new adaptive transform based on the same principle as that used in deriving the DCT from the optimal Karhunen-Loeve transform (KLT). We analyze the tradeoff relationship between compression performance, computational complexity, and codec complexity for different coding schemes. Simulation results show that complicated algorithms (e.g., iterative, adaptive) can improve the quality by 5-10 dB at some computational or hardware cost. Alternatively, the simple mirror image extension technique improves the quality by 3-4 dB without any overheads. The contributions of this paper lie in efficient problem formulations, new transform coding techniques, and numerical tradeoff analyses. [ABSTRACT FROM AUTHOR]