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This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90 nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves a high linearity in a wide band (0.5---6 GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below ?8.8 dB up to 6 GHz. The measured single sideband noise figure at an LO frequency of 3 GHz and an IF of 10 MHz is 6.25 dB. The front-end achieves a voltage conversion gain of 4.5 dB at 1 GHz with 3 dB bandwidth of more than 6 GHz. The measured input referred 1 dB compression point is +1.5 dBm while the IIP3 is +11.73 dBm and the IIP2 is +26.23 dBm respectively at an LO frequency of 2 GHz. The RF front-end consumes 6.2 mW from a 1.1 V supply with an active chip area of 0.0856 mm2.

A systematic approach to the power consumption of analog circuits is presented. The power consumption is related to basic circuit requirements, as dynamic range, bandwidth, noise figure and sampling speed and is considering basic device and device scaling behavior. Several kinds of circuits are treated, as samplers, amplifiers, filters and oscillators. The objective is to derive lower bounds to power consumption in analog circuits, to be used as design targets when designing power-constrained analog systems. The original publication is available at www.springerlink.com: Christer Svensson and Jacob Wikner, Power consumption of analog circuits: a tutorial, 2010, ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, (65), 2, 171-184. http://dx.doi.org/10.1007/s10470-010-9491-7 Copyright: Springer Science Business Media http://www.springerlink.com/

A simulation technique is developed in TCAD to study the non-linear behavior of RF power transistor. The technique is based on semiconductor transport equations to swot up the overall non-linearity’s occurring in RF power transistor. Computational load-pull simulation technique (CLP) developed in our group, is further extended to study the non-linear effects inside the transistor structure by conventional two-tone RF signals, and initial simulations were done in time domain. The technique is helpful to detect, understand the phenomena and its mechanism which can be resolved and improve the transistor performance. By this technique, the third order intermodulation distortion (IMD3) was observed at different power levels. The technique was successfully implemented on a laterally-diffused field effect transistor (LDMOS). The value of IMD3 obtained is −22 dBc at 1-dB compression point (P 1 dB) while at 10 dB back off the value increases to −36 dBc. Simulation results were experimentally verified by fabricating a power amplifier with the similar LDMOS transistor.

In this paper a flexible RF-sampling front-end primarily intended for WLAN standards operating in the 2.4 GHz and 5-6 GHz bands is presented. The circuit is implemented with on-chip Design for Test (DfT) features in 0.13 µm CMOS process. The front-end consists of a wideband LNA, a sampling IQ down-converter implemented as switched-capacitor decimation filter, test attenuator (TA), and RF detectors. The architecture is generic and scalable in frequency. It can operate at a sampling frequency up to 3 GHz and RF carrier up to 6 GHz with 2× subsampling. The selectable decimation factor of 8 or 16 makes the A/D conversion feasible. The frequency response, linearity, and NF of the whole front-end have been measured. The power consumption of complete RF front-end is 176 mW. The on-chip DfT features are helpful in reduction of overall test cost and time in volume production. The measurement results show the feasibility of DfT approach for multiband radio receiver design using standard CMOS process.

In this paper we present an SC filter for RF downconversion using the direct RF sampling and decimation technique. The circuit architecture is generic and it features high image rejection for wideband signals and good linearity. An SC implementation in 0.13?m CMOS suitable for an RF of 2.4 GHz and 20 MHz signal bandwidth is presented as a demonstrator. Simulation results obtained using Cadence Spectre simulation tools are included.

We present a theory for metastability error power in Successive Approximation A/D converters. The traditional measure, BER, does not account for the error influence on signal quality, only the error rate. The metastability error is instead compared with noise, and a Signal-to-Metastability-error-Ratio, SMR, is suggested as a new measure. Suppressing SMR below SNR imposes a gain requirement on the comparator.

We have constructed an addressable 256 × 256 photodiode sensor array together with an 8-bit ADC (analog-to-digital converter) on the same chip. Such a digital camera is easy to connect to a computer where also the flexibility of the computer can be used to control the camera output. The sensor has been constructed in two versions. The first version was implemented with a 256-column parallel-bit-slice image processor on the same die in a commercial project and the second as a separate addressable digital image sensor. The sensor was functionally fabricated using 1.6 µm design rules in a 1.2 µm CMOS process where it required a total area of 96 mm2.

The architectures, implementation and applications of two smart sensors, LAPP and PASIC, are described. The basic idea of these two designs is to integrate an image sensor array with a digital processor array in a single chip. The integrated camera-and-processor eliminates the bottleneck of sequential image read-out that characterizes conventional systems. They provide fast, compact and economic solutions for tasks such as industrial inspection, optical character recognition and robot vision.

A case-referent study on the possible association between radon emanating from the ground and bronchial cancer was carried out on 292 female lung cancer cases and 584 matched population referents. Both groups had lived for at least 30 years in the city of Stockholm, Sweden. The cases were diagnosed during 1972 to 1980 with oat-cell and other types of anaplastic pulmonary carcinomas. A sample of about 10% of the dwellings where cases and referents had lived was selected for measurements of radon and radon daughters. There was a relative risk of 2.2 (P = 0.01) for lung cancer associated with living in dwellings close to the ground in areas with an increased risk of radon emanation. Smoking habits did not appear to be a major confounding factor for this association, although a detailed evaluation was not possible. The measurements indicated increased radon daughter concentrations in ground level dwellings within radon risk areas where lung cancer cases had lived, suggesting that this exposure was of etiologic importance.

We report studies of transport properties of thin films of undoped poly(3-hexylthiophene) (P3HT) fabricated by spinning a polymer solution onto oxidised silicon or glass. The film thicknesseswere on the order of 1000 Å. We studied magnetoresistance, the effect of magnetic field on field effect mobility and Hall effect.Transverse magnetoresistance was measured on films on glass. A positive anomalous magnetoresistance with a saturation value of about 0.1 % was found. Transverse magnetoresistance was also studied by measuring the change of a field effect mobility with magnetic field. This measurement was performed using the field effect transistor structure. An initial mobility of 6.5 × 10−5 cm2/Vs was reduced by about 15 % in a transverse magnetic field.We also carried out Hall effect measurements on films on glass using a Van der Pauw contact configuration. The measured Hall mobility was 2.17 × 10−5 cm2/Vs. Finally we measured the temperature dependence of the Hall mobility and found it follow the exp(T-l/4) law of variable range hopping.

Crystalline 9-hydroxyphenalenone is monoclinic between 145 K and the melting point at 475 K. The space group is P21 below 255 K, P21/c between 255 K and 380 K, and I2/c above 385 K. A model for the 255 K transition involves inplane rotations of about 40° for one quarter of the molecules. Further rotation and translation takes place at the 380–385 K phase transitions. All three phases are expected to be ferroelastic, but at present only the unit cell of the room temperature phase has been reversibly reoriented. The spontaneous strain decreases from 0.24 at 145 K through 0.18 at room temperature to 0.14 at 430 K, assuming a tetragonal prototype. Domain walls are temperature dependent with orientation (1.86, 0, 1) and (1, 0, −1.86) at 298 K. Ferroelastic transformation proceeds by a slip process, approximately in the molecular planes. A prototype common to all three phases can be derived with space group P41. Macroscopically, the transformation is accompanied by a remarkable change of shape; if unfractured, the crystals exhibit shape memory.