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4 results on '"Multiprocessadors"'

1. Static task mapping for tiled chip multiprocessors with multiple voltage islands

Author

Nikita Nikitin, Jordi Cortadella, Universitat Politècnica de Catalunya. Departament de Llenguatges i Sistemes Informàtics, and Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals

Subjects
Power management, Extremal optimization, Hardware_MEMORYSTRUCTURES, Microprocessor chips, Multiprocessing systems, Computer science, Memory bandwidth, Parallel computing, Multiprocessadors, Reuse, Chip, Ordinadors -- Consum d'energia, Parallel architectures, Task mapping, Simulated annealing, Memory architecture, Combinatorial optimization, Optimisation, Chip multiprocessing, Informàtica::Arquitectura de computadors [Àrees temàtiques de la UPC]
Abstract

The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping onto general-purpose CMPs with multiple pre-defined voltage islands for power management. The CMPs are assumed to contain different classes of processing elements with multiple voltage/frequency execution modes to better cover a large range of applications. Task mapping is performed with awareness of both on-chip and off-chip memory traffic, and communication constraints such as the link and memory bandwidth. Besides proposing a linear programming model for small systems, a novel mapping approach based on Extremal Optimization is proposed for large-scale CMPs. This new combinatorial optimization method has delivered very good results in quality and computational cost when compared to the classical simulated annealing.

Published
2012
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2. Buffer sizing for self-timed stream programs on heterogeneous distributed memory multiprocessors

Author

Alex Ramirez, Eduard Ayguadé, Paul M. Carpenter, Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, and Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions

Subjects
Random graph, Parallel processing (Electronic computers), Computer science, Concurrency, Computation, Parallel computing, Multiprocessadors, computer.software_genre, Sizing, Arquitectura d'ordinadors, Multiprocessors, Distributed memory, Compiler, Latency (engineering), Informàtica::Arquitectura de computadors::Arquitectures paral·leles [Àrees temàtiques de la UPC], computer, General algorithm
Abstract

Stream programming is a promising way to expose concurrency to the compiler. A stream program is built from kernels that communicate only via point-to-point streams. The stream compiler statically allocates these kernels to processors, applying blocking, fission and fusion transformations. The compiler determines the sizes of the communication buffers, which affects performance since local memories can be small. In this paper, we propose a feedback-directed algorithm that determines the size of each communication buffer, based on i) the stream program that has been mapped onto processors, ii) feedback from an earlier execution, and iii) the memory constraints. The algorithm exposes a trade-off between throughput and latency. It is general, in that it applies to stream programs with unstructured stream graphs, and it supports variable execution times and communication rates. We show results for the StreamIt benchmarks and random graphs. For the StreamIt benchmarks, throughput is optimal after the first iteration. For random graphs with stochastic computation times, throughput is within 3% of optimal after four iterations. Compared with the previous general algorithm, by Basten and Hoogerbrugge, our algorithm has significantly better performance and latency.

Published
2010
Full Text
View/download PDF

3. Static task mapping for tiled chip multiprocessors with multiple voltage islands

Author

Universitat Politècnica de Catalunya. Departament de Llenguatges i Sistemes Informàtics, Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals, Nikitin, Nikita, Cortadella, Jordi, Universitat Politècnica de Catalunya. Departament de Llenguatges i Sistemes Informàtics, Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals, Nikitin, Nikita, and Cortadella, Jordi

Abstract

The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping onto general-purpose CMPs with multiple pre-defined voltage islands for power management. The CMPs are assumed to contain different classes of processing elements with multiple voltage/frequency execution modes to better cover a large range of applications. Task mapping is performed with awareness of both on-chip and off-chip memory traffic, and communication constraints such as the link and memory bandwidth. A novel mapping approach based on Extremal Optimization is proposed for large-scale CMPs. This new combinatorial optimization method has delivered very good results in quality and computational cost when compared to the classical simulated annealing., Peer Reviewed, Postprint (published version)

Published
2012

4. Buffer sizing for self-timed stream programs on heterogeneous distributed memory multiprocessors

Author

Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions, Carpenter, Paul Matthew, Ramírez Bellido, Alejandro, Ayguadé Parra, Eduard, Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions, Carpenter, Paul Matthew, Ramírez Bellido, Alejandro, and Ayguadé Parra, Eduard

Abstract

Stream programming is a promising way to expose concurrency to the compiler. A stream program is built from kernels that communicate only via point-to-point streams. The stream compiler statically allocates these kernels to processors, applying blocking, fission and fusion transformations. The compiler determines the sizes of the communication buffers, which affects performance since local memories can be small. In this paper, we propose a feedback-directed algorithm that determines the size of each communication buffer, based on i) the stream program that has been mapped onto processors, ii) feedback from an earlier execution, and iii) the memory constraints. The algorithm exposes a trade-off between throughput and latency. It is general, in that it applies to stream programs with unstructured stream graphs, and it supports variable execution times and communication rates. We show results for the StreamIt benchmarks and random graphs. For the StreamIt benchmarks, throughput is optimal after the first iteration. For random graphs with stochastic computation times, throughput is within 3% of optimal after four iterations. Compared with the previous general algorithm, by Basten and Hoogerbrugge, our algorithm has significantly better performance and latency., Postprint (published version)

Published
2010

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