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A simplified TiAlN\Ir bottom electrode (BE) has been applied for the integration of stacked SrBi 2 Ta 2 O 9 (SBT) ferroelectric capacitors on W-plugs. In order that the W-plugs are less exposed to oxygen during the high thermal budget used for the SBT crystallization (700°C/1 h), the implementation of low O 2 partial pressures was investigated. The optimization of the annealing conditions (O 2 flow) was attained by using planar TiAlN\Ir\ SBT FeCAP's. It was found that the optimal O 2 content was ∼⃒20 ppm (∼⃒10 -3 Torr), attaining polarization values (P r ) as high as 7 μ C/cm 2 . Higher O 2 partial pressures leads to SBT with inferior ferroelectric characteristics (Pr ∼⃒ 3 μ C/cm 2 in full O 2 atmosphere), which correlated well with the formation of IrO 2 at the Ir-SBT interface. If patterned TiAlN\ Ir BE structures are used and SBT is crystallized at the optimal O 2 partial pressure, the system is no longer stable due to extended lateral oxidation of the TiAlN film, buckling of the Ir film and subsequent W-plug oxidation. These results will be explained taking into consideration the combination of high tensile stress in the SBT and the Ir films when annealed in atmospheres close to pure N 2 . [ABSTRACT FROM AUTHOR]

This paper reports on the integration of MOCVD SBT based stacked ferroelectric capacitors in a 0.35 μm CMOS technology for embedded FeRAM, using a ferroelectric capacitor (FeCap) that is scalable to a 3D configuration. The electrical parameters of the CMOS devices with and without FeCap integration are presented. No significant shifts of the CMOS characteristics are noticed after FeCap integration. Also the effects of the CMOS processing on the FeCaps are discussed. There is no degradation of the hysteresis loops of the FeCaps throughout the CMOS back-end-of-line processing, which proves that the integrated encapsulation layer effectively prevents any hydrogen induced damage. Another key element in the successful integration of stacked ferroelectric devices is the conductive oxygen barrier, which protects the plugs from oxidation. A low contact resistance and a high yield are obtained on plug contacts covered by the oxygen barrier. Also damage free etching is a critical issue in FeRAM integration. Excellent results are presented for the etch process to form the contacts to the electrodes. [ABSTRACT FROM AUTHOR]

The thermal and mechanical stability of Ir and Ir\Pt metals spacers deposited on top of Ti(Al)N\Ir\IrO 2 patterned structures has been investigated in pseudo 3D stacked SrBi 2 Ta 2 O 9 (SBT) capacitors. Their stability was compared to standard TEOS spacers. The high compressive stress at the edge of patterned electrodes, as a consequence of the high thermal expansion mismatch between the metals used in the electrode and TEOS, make the system mechanically unstable at the SBT crystallization conditions (700°C for 1 hour). The mechanical problems could be overcome if the same noble metals used in the electrode are incorporated as spacers. However, thermal stability during the SBT crystallization conditions is still an issue. For the case of Ir, surface oxidation decreases the SBT polarization values. In the case of Ir\Pt, Ir diffuses through Pt and oxidizes, leading to unstable patterned structures and to the oxidation of the Ti(Al)N layer. [ABSTRACT FROM AUTHOR]