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As one of the main expected advantages of organic electronics is the low cost, printing technologies are actively investigated for the fabrication of OTFTs. Techniques such as ink-jet or gravure printing frequently results in organic semiconductor (OSC) layers with low crystallinity and relatively low carrier mobility. Moreover, the minimal feature sizes attainable are often in the range of the tens of microns. Hence, the resulting carrier transit time (τ) in the channel of OTFTs can be of the order of tenth of milliseconds with associated cut off frequencies in AC regime in the range of few kilohertz [1]. Due to the large tolerances associated to printing processes, the layout of printed OTFTs often includes semiconductor regions whose dimensions are chosen prudently larger than the spacing existing between the source and drain contacts. The presence of the parasitic regions, that is negligible in DC operation, must be accounted in order to accurately reproduce the dynamic operation of these devices. Due to the relatively high value of τ, it is very likely that in practical applications organic circuits are operated with signals varying on a time scale of the same order or shorter than τ. Hence, the carriers in the device don’t have enough time to reach the distribution associated to stationary conditions and the OTFTs enter in non quasi static (NQS) regime of operation. The device response to large variation of its polarization (large signal, LS) becomes dependent on the delay times associated with the high value of τ. Moreover, in NQS regime the device effective admittance in small signal (SS) AC operation is found to be dependent upon the small signal frequency [2][3]. Hence, to successfully design electrical circuits employing printed OTFTs, it is necessary to develop compact models that are able to precisely reproduce not only the DC operation but also the LS and SS AC behavior of these devices. In this work, a large signal non quasi static (LS-NQS) compact model has been developed: the model is based on the current continuity equation that, in the case of a MOSFET transistor channel, can be cast as a partial differential equation (PDE) governing the carrier density distribution during time, Q(x,t), in a distributed RC transmission line. In order to solve this PDE, the space variable x is discretized by using a spline collocation approach: the PDE is transformed in a set of ordinary differential equations (ODE) in the time variable t, that can be solved numerically in a “SPICE-like” circuit simulation environment [4], [5]. The spline collocation approach allows to choose the number of splines (N) in which the device channels and the parasitic regions are split: by choosing an appropriate value for N it is possible to find the best compromise between computation accuracy and performance. NQS models have been already investigated and developed for crystalline silicon MOSFETs. The model presented in this work differs from the crystalline silicon counterparts in two major aspects: 1 – the equations accounting for the charge and current densities are based upon the variable range hopping (VRH) theory that is well suited for amorphous organic semiconductors[6]. 2 – the model takes into account the presence of parasitic regions by imposing appropriate boundary conditions on their extremities. The LS-NQS model has been implemented in Verilog-A and validated by simulating the electrical behavior of multi-fingered OTFTs, with staggered top-gate configuration, fabricated on PEN substrates by means of a fully printed process. The devices were characterized and simulated in DC, and SS AC operation. A common source amplifier circuit has been realized and measured in LS operation. As can be seen from fig. 1, the model reproduce perfectly the device behavior in LS operation. Moreover, the use of the model has permitted to gain several physical insights concerning the device operation. [1] J. S. Chang et al., IEEE J. Emerg. Sel. Top. Circuits Syst., vol. 7, no. 1, pp. 7–26, Mar. 2017, doi: 10.1109/JETCAS.2017.2673863. [2] A. Valletta et al., IEEE Trans. Electron Devices, vol. 61, no. 12, pp. 4120–4127, Dec. 2014, doi: 10.1109/TED.2014.2364451. [3] J. Leise et al., IEEE Trans. Electron Devices, vol. 67, no. 11, pp. 4672–4676, Nov. 2020, doi: 10.1109/TED.2020.3018094 [4] A. Valletta et al. in 2016 46th European Solid-State Device Research Conference (ESSDERC), Lausanne, Switzerland, Sep. 2016, pp. 460–463, doi: 10.1109/ESSDERC.2016.7599685. [5] A. Valletta et al. in 2017 European Conference on Circuit Theory and Design (ECCTD), Catania, Sep. 2017, pp. 1–4, doi: 10.1109/ECCTD.2017.8093225. [6] F. Torricelli et al., IEEE Trans. Electron Devices, vol. 56, no. 1, pp. 20–30, Jan. 2009, doi: 10.1109/TED.2008.2007717. Figure 1

The technology based on organic devices and sensors is becoming attractive for a wide range of applications. Indeed, the intrinsic characteristics of the organic materials, as the low-temperature process, flexibility, lightweight, biocompatibility, and even biodegradability, make them the basis for devices for the emerging flexible plastic electronics. Among the different possible applications, the electro-optical properties of organic semiconductors can be exploited for the development of devices for photosensing [1], imaging array [2], and optical memory [3]. The wide number of organic materials with different absorption spectra allows the development of photosensors with large spectral sensitivity or tuned to specific wavelengths. In particular, organic phototransistors (OPTs) are particularly promising since they combine light detection, typical of the photodiodes (OPD), with the intrinsic signal amplification that increases the device sensitivity. The response of the OPTs to light irradiation was widely studied in the last years. The photons with energy above the optical gap generate excitons that can dissociate into free holes and electrons and, in p-type devices, the photo-generated electrons are trapped. Negative trapped charges induce the shift of the flat band voltage as well as the threshold voltage of the OPT resulting in the increase of the drain current [4]. The location and the nature of the defect states are still under investigation. Depending on the organic semiconductor, gate dielectric and device structure, the defects have been identified as interface states between semiconductor and insulators [2], defects into the semiconductors [3], defects induced by the diffusion of oxygen or moisture into the OSC [5]. Trapped charge near the source/drain electrodes can also reduce the injection contact barrier, increasing the drain current [6]. In any case, photo-induced effects appear to be a quite general effect since they are observed in devices with different semiconductor molecules and different gate dielectric (both organic and inorganic). In this presentation, the different mechanisms will be reviewed and the photo-induced effects will be discussed for OTFTs with evaporated and solution-processed semiconductors and different device structures. The high stability of these devices under gate bias stress, allows to investigate in detail the effects induced by the light. Furthermore, this presentation will show the application of the electro-optical properties of the OTFTs to the development of radiation detectors based on Organic Photo Transistors (OPTs), made on flexible substrate, and coupled with plastic scintillators. The OPTs are based on organic semiconductor dinaphtho [2,3-b:2′,3′-f] thieno[3,2-b] thiophene (DNTT) and have Bottom Gate/Top contact multi-finger device structure in order to simplify the device coupling with scintillator and increase the device area. The channel length, L, and channel width, W, are 100 µm and 2 cm, respectively. The gate, source and drain, and the semiconductor layer (DNTT, 30 nm thick) are thermally evaporated through metal masks. Spin coated layers of Cytop are used as gate dielectric and passivation layer. Thanks to the high quality of the semiconductor and of the dielectric/semiconductor interface, the devices show good electrical characteristics, with field effect mobility of about 1 cm2/Vs, a threshold voltage of the order of -10 V and subthreshold voltage of about 1V/dec. Furthermore, the devices do not show hysteresis of the transfer characteristics and are quite stable under bias stress. The OPTs have been characterized by electrical and optical measurement in order to evaluate the figures of merit parameters of the photodetectors, such as the photo-switching speed, the responsivity, and the photocurrent on/off ratio (also indicated as photosensitivity). The measurements have been carried out under monochromatic light with λ= 450 nm (above the optical gap of the DNTT). At this wavelength, these OPTs are able to detect very low light intensity (of the order of few nW/cm2), with a responsivity of 0.25 A/W and sensitivity of 2x10-2. The OPTs are successfully coupled with siloxane based scintillator. This work is supported by INFN-CNS5 project "FIRE". [1] J. Huang et al., Adv. Mater. 2020, 32, 1906027 [2] Y. Chu et al., Adv. Sci. 2016, 3, 1500435 [3] K. Pei et al., Adv. Mater. 2018, 30, 1706647 [4] A. Pierre and A.C. Arias, Flex. Print. Electron 1 (2016) 043001 [5] R. Jia and e. al., Adv. Funct. Mater., vol. 29, p. 1905657, 2019. [6] X. Wang et al., J. Appl. Phys. 107, 024509 (2010).

The electrical characteristics of organic thin film transistors (OTFTs) are frequently affected by contact effects, which can seriously reduce the transistor performance. The “parasitic” voltage drop at the contacts, induced by contact resistance, decreases the effective drain-source and gate-source voltages applied to the intrinsic channel of the transistor, reducing the device current. The importance of the contact resistance, Rc, is more relevant in the case of high carrier mobility and/or small channel length devices, where its value may become comparable or even larger than the channel resistance. Rc appears to be strongly affected by the device architecture and much higher Rc-values are typically observed, at low drain voltages, in coplanar structures (i.e. Bottom Gate/Bottom Contact, BGBC devices) than in staggered structures (i.e. Top Gate/Bottom Contact, TGBC devices). The presence of Schottky barriers, trap states, field dependence of carrier mobility and defected regions near the electrodes have been suggested as the origin of Rc. In this work, the contacts effects in devices with different architectures (staggered and coplanar) will be discussed. Devices characteristics have been measured at different temperature and the results have been analysed by using 2D numerical simulations (fig. 1 and 2). The electrical characteristics of both type of devices can be reproduced considering a Schottky barrier at the source contact with an “effective” barrier lowering, that takes into account different field-dependent effects occurring at the contacts (Shottky effect, tunnelling, trap assisted tunneling) that can increase the current injected by the electrode (fig.1 and 2). In the case of staggered devices, the detailed analysis of the current density shows that, at low Vds and for a given Vgs, the current is mainly injected from an extended source contact region overlapped by the gate electrode, inducing a current spreading along the contact (Ic - current in fig.3). The distribution of the current spreading remains basically constant for increasing Vds up to a value Vdsat1 (fig. 1), when the depletion layer of the Schottky contact expands reaching the insulator-semiconductor interface and causing the pinch-off of the channel at the source end. For Vds>Vdsat1 the current injected from the edge of the source contact rapidly increases (Iedge in fig.3a), due to field enhanced injection mechanisms, while the current injected from the remaining part of the source contact basically saturates. At higher drain voltage (Vds>Vdsat2, see fig.1), pinch off at the drain occurs. In the case of coplanar devices, current spreading, obviously, does not occurs and even at low Vds the current increase is related to the field enhanced injection mechanisms that take place at the edge of the source contact (fig.3b). The lack of the extended contact contribution to the injected current explains the higher contact resistance usually observe in coplanar devices at low Vds compared to staggered OTFTs. On the other hand, at high Vds (saturation condition) higher electric fields are present, in coplanar structure, near the source, that is in direct contact to the channel region. This results in a more efficient carrier injection that allows obtaining an almost ohmic contact condition in coplanar devices in saturation condition.

Organic Thin film Transistors (OTFT) have been widely investigated in these last years as potential candidate for the development of low cost, flexible and lightweight active-matrix backplanes for display applications. Indeed the organic semiconductors provide both promising electrical performances tunable by chemistry and the ability to be processed at low temperature with innovative printing technics on various large scale substrates. Thanks to the recent developments on both n-type and p-type solution-processed organic semiconductors, we have developed a printable organic CMOS technology compatible with flexible PEN substrates. By combining state of the art materials exhibiting mobility in the range of 1 cm2/V.s and silicon inspired compact modeling and simulation approach, we were able to design and fabricate circuit's building blocks that provide the switching, digital and analog functions required for the fabrication of printed systems on foil.

Contact effects in staggered SBTs with three different active layers (organic semiconductor (pentacene derivative), a-Si:H and IGZO) have been analyzed by using numerical simulations. In general, in staggered SBTs the presence of a Schottky barrier at the source severely limits the carrier injection, thus substantially reducing the on-current and, consequently, the on-off ratio, if compared to conventional TFT structures. On the other hand, depending upon barrier height and barrier lowering mechanisms, staggered SBTs can show interesting features, such as: 1) very low saturation voltage, resulting in much lower operating drain voltages and power dissipation; 2) increased output impedance, leading to larger voltage gain; 3) simpler fabrication, as doped regions are not necessary. Device characteristics of these devices are seriously influenced by contact effects, with the parasitic voltage drops at the contacts reducing the effective voltages applied to the channel of the transistor. A simple method to extract the contact I-V characteristics is presented and also a distributed diode model is discussed to reproduce the output characteristics and implementable in circuit simulations.

Future system-on-panel applications require further performance improvement of circuits based on polycrystalline silicon thin film transistors (TFTs). The biggest leverage in circuit performance can be obtained by reducing channel length from the typical current values of 3-6 micron to 1 micron, or less. Therefore, short channel effects in scaled down polysilicon TFTs will have to be controlled in order to allow proper operation of the circuits. In this work we review a number of specific aspects of the electrical characteristics of short channel devices (channel lengths down to 0.4 micron) combining electrical characteristics measurements and two-dimensional numerical simulations.

An unambiguous characterisation of the polycrystalline-Si grain boundary behaviour has been obtained by studying thin film transistors, TFTs, realized on sequentially lateral solidified, SLS, material. The grain boundary, GB, carrier trapping has been distinguished from intra-grain trapping by analysing TFTs with channels aligned along two orthogonal directions in this anisotropic material: the thermal activation energy of the channel current was measured in the two orthogonal directions, and the difference in activation energy was related to carrier flow over perpendicular GBs. Two dimensional numerical simulations show that the experimental behaviour is correctly reproduced by a finite-width GB, in which carrier flow is controlled by transport across a resistive GB region, rather than by emission over a barrier.

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