Search

The finite element method was used to determine the thermal resistance of a flip-chip-bonded GaN-based vertical-cavity surface-emitting laser (VCSEL) with substrate removal and dielectric distributed Bragg reflectors (DBRs). In this work, we investigate the effects of the DBR configuration, mask layer alignment tolerances, aperture diameters, and cladding layer thicknesses on the thermal properties of the flip-chip design. The current flip-chip design suffers from high thermal resistance (∼4600 K W−1). By reducing the mask layer alignment tolerances and increasing the cladding thickness, the thermal resistance values could be made comparable to devices reported in the literature that achieved CW operation at room temperature (∼3000 K W−1). Low thermal resistance designs are critical to achieve CW operation and mitigate the effects of thermal roll-over in flip-chip GaN-based VCSELs. [ABSTRACT FROM AUTHOR]

The effects of several design geometries on the thermal resistance for a flip‐chip GaN‐based VCSEL with dielectric distributed Bragg reflectors was studied by Mishkat‐Ul‐ Masabih (article no. 1600819) using finite‐element analysis. The current flip‐chip design suffers from high thermal resistance, preventing devices to lase under CW operation. It was found that including a patterned DBR with recessed metal, reducing the lithography alignment tolerances, and increasing the aperture size; all contributed to the reduction of the thermal resistance of the design. In addition, epitaxially increasing the cladding layer thickness on either side of the active region also lowered the thermal resistance significantly. The thermal resistance values for previously reported CW device configurations were also calculated and compared to our flip‐chip design. The internal temperature changes at the threshold were estimated for the devices, indicating why previous generations of our flip‐chip devices could not achieve CW lasing. Combining these techniques, the effects of thermal roll‐over can be mitigated; as the reduction of the device temperature is a key consideration for obtaining high output power CW GaN‐based VCSELs. [ABSTRACT FROM AUTHOR]