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Analog compute‐in‐memory (CIM) systems are promising candidates for deep neural network (DNN) inference acceleration. However, as the use of DNNs expands, protecting user input privacy has become increasingly important. Herein, a potential security vulnerability is identified wherein an adversary can reconstruct the user's private input data from a power side‐channel attack even without knowledge of the stored DNN model. An attack approach using a generative adversarial network is developed to achieve high‐quality data reconstruction from power leakage measurements. The analyses show that the attack methodology is effective in reconstructing user input data from power leakage of the analog CIM accelerator, even at large noise levels and after countermeasures. To demonstrate the efficacy of the proposed approach, an example of CIM inference of U‐Net for brain tumor detection is attacked, and the original magnetic resonance imaging medical images can be successfully reconstructed even at a noise level of 20% standard deviation of the maximum power signal value. This study highlights a potential security vulnerability in emerging analog CIM accelerators and raises awareness of needed safety features to protect user privacy in such systems. [ABSTRACT FROM AUTHOR]

Network features found in the brain may help implement more efficient and robust neural networks. Spiking neural networks (SNNs) process spikes in the spatiotemporal domain and can offer better energy efficiency than deep neural networks. However, most SNN implementations rely on simple point neurons that neglect the rich neuronal and dendritic dynamics. Herein, a bio‐inspired columnar learning network (CLN) structure that employs feedforward, lateral, and feedback connections to make robust classification with sparse data is proposed. CLN is inspired by the mammalian neocortex, comprising cortical columns each containing multiple minicolumns formed by interacting pyramidal neurons. A column continuously processes spatiotemporal signals from its sensor, while learning spatial and temporal correlations between features in different regions of an object along with the sensor's movement through sensorimotor interaction. CLN can be implemented using memristor crossbars with a local learning rule, spiking timing‐dependent plasticity (STDP), which can be natively obtained in second‐order memristors. CLN allows inputs from multiple sensors to be simultaneously processed by different columns, resulting in higher classification accuracy and better noise tolerance. Analysis of networks implemented on memristor crossbars shows that the system can operate at very low power and high throughput, with high accuracy and robustness to noise. [ABSTRACT FROM AUTHOR]

In analog in‐memory computing systems based on nonvolatile memories such as resistive random‐access memory (RRAM), neural network models are often trained offline and then the weights are programmed onto memory devices as conductance values. The programmed weight values inevitably deviate from the target values during the programming process. This effect can be pronounced for emerging memories such as RRAM, PcRAM, and MRAM due to the stochastic nature during programming. Unlike noise, these weight deviations do not change during inference. The performance of neural network models is investigated against this programming variation under realistic system limitations, including limited device on/off ratios, memory array size, analog‐to‐digital converter (ADC) characteristics, and signed weight representations. Approaches to mitigate such device and circuit nonidealities through architecture‐aware training are also evaluated. The effectiveness of variation injection during training to improve the inference robustness, as well as the effects of different neural network training parameters such as learning rate schedule, will be discussed. [ABSTRACT FROM AUTHOR]

Memristive devices have demonstrated rich switching behaviors that closely resemble synaptic functions and provide a building block to construct efficient neuromorphic systems. It is demonstrated that resistive switching effects are controlled not only by the external field, but also by the dynamics of various internal state variables that facilitate the ionic processes. The internal temperature, for example, works as a second‐state variable to regulate the ion motion and provides the internal timing mechanism for the native implementation of timing‐ and rate‐based learning rules such as spike timing dependent plasticity (STDP). In this work, it is shown that the 2nd state‐variable in a Ta2O5‐based memristor, its internal temperature, can be systematically engineered by adjusting the material properties and device structure, leading to tunable STDP characteristics with different time constants. When combined with an artificial post‐synaptic neuron, the 2nd‐order memristor synapses can spontaneously capture the temporal correlation in the input streaming events. [ABSTRACT FROM AUTHOR]

The advances of neural recording techniques have fostered rapid growth of the number of simultaneously recorded neurons, opening up new possibilities to investigate the interactions and dynamics inside neural circuitry. The high recording channel counts, however, pose significant challenges for data analysis because the required time and computational resources grow superlinearly with the data volume. Herein, the feasibility of real‐time reconstruction of neural functional connectivity using a second‐order memristor network is analyzed. Spike‐timing‐dependent plasticity, natively implemented by the internal dynamics of the memristor device, leads to the successful discovery of temporal correlations between pre‐ and postsynaptic spikes of the simulated neural circuits in an unsupervised fashion. The proposed system demonstrates high classification accuracy under a wide range of parameter settings considering indirect connections, synaptic weights, transmission delays, connection density, and so on, and enables the capturing of dynamic connectivity evolutions. The influence of device nonideal factors on detection accuracy is systematically evaluated, and the system shows robustness to initial weight randomness, and cycle‐to‐cycle and device‐to‐device variations. The proposed method allows direct mapping of neural connectivity onto the artificial memristor network and can lead to efficient front‐end data analysis of high‐density neural recording systems and potentially directly coupled bioartificial networks. [ABSTRACT FROM AUTHOR]

Memristors have emerged as transformative devices to enable neuromorphic and in‐memory computing, where success requires the identification and development of materials that can overcome challenges in retention and device variability. Here, high‐entropy oxide composed of Zr, Hf, Nb, Ta, Mo, and W oxides is first demonstrated as a switching material for valence change memory. This multielement oxide material provides uniform distribution and higher concentration of oxygen vacancies, limiting the stochastic behavior in resistive switching. (Zr, Hf, Nb, Ta, Mo, W) high‐entropy‐oxide‐based memristors manifest the "cocktail effect," exhibiting comparable retention with HfO2‐ or Ta2O5‐based memristors while also demonstrating the gradual conductance modulation observed in WO3‐based memristors. The electrical characterization of these high‐entropy‐oxide‐based memristors demonstrates forming‐free operation, low device and cycle variability, gradual conductance modulation, 6‐bit operation, and long retention which are promising for neuromorphic applications. [ABSTRACT FROM AUTHOR]

The development of smart, scalable, and power efficient computers relies on innovative technologies that can distribute memory alongside processing, such as emerging neuromorphic computing and in-memory logic technologies. Here, a type of vertical 3-terminal oxide based nanoionic device capable of implementing heterosynaptic plasticity and nonvolatile Boolean logic simultaneously is demonstrated. The heterosynaptic plasticity endows the devices with facilely tunable synaptic kinetics via tailoring modulatory signals, which is shown to be crucial for achieving optimized learning scheme, therefore offering promising building blocks for neuromorphic computing. Furthermore, it is demonstrated that these heterosynaptic devices can simultaneously be utilized to implement nonvolatile Boolean logic with improved efficiency compared with existing approaches, therefore implying in-memory computing potentialities. The heterosynaptic devices with such multifunctionality thus hold great potential for next-generation non-von Neumann computing applications. [ABSTRACT FROM AUTHOR]

Memristors have attracted broad interest as a promising candidate for future memory and computing applications. Particularly, it is believed that memristors can effectively implement synaptic functions and enable efficient neuromorphic systems. Most previous studies, however, focus on implementing specific synaptic learning rules by carefully engineering external programming parameters instead of focusing on emulating the internal cause that leads to the apparent learning rules. Here, it is shown that by taking advantage of the different time scales of internal oxygen vacancy ( VO) dynamics in an oxide-based memristor, diverse synaptic functions at different time scales can be implemented naturally. Mathematically, the device can be effectively modeled as a second-order memristor with a simple set of equations including multiple state variables. Not only is this approach more biorealistic and easier to implement, by focusing on the fundamental driving mechanisms it allows the development of complete theoretical and experimental frameworks for biologically inspired computing systems. [ABSTRACT FROM AUTHOR]

Advances in the understanding of nanoscale ionic processes in solid‐state thin films have led to the rapid development of devices based on coupled ionic–electronic effects. For example, ion‐driven resistive‐switching (RS) devices have been extensively studied for future memory applications due to their excellent performance in terms of switching speed, endurance, retention, and scalability. Recent studies further suggest that RS devices are more than just resistors with tunable resistance; instead, they exhibit rich and complex internal ionic dynamics that equip them with native information‐processing capabilities, particularly in the temporal domain. RS effects induced by the migration of different types of ions, often driven by an electric field, are discussed. It is shown that, by taking advantage of the different state variables controlled by the ionic processes, important synaptic functions can be faithfully implemented in solid‐state devices and networks. Recent efforts on improving the controllability of ionic processes to optimize device performance are also discussed, along with new opportunities for material design and engineering enabled by the ability to control ionic processes at the atomic scale. [ABSTRACT FROM AUTHOR]