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Lanthanide‐doped scintillators have the ability to convert the absorbed X‐ray irradiation into ultraviolet (UV), visible (Vis), or near‐infrared (NIR) light. Lanthanide‐doped scintillators with excellent persistent luminescence (PersL) are emerging as a new class of PersL materials recently. They have attracted great attention due to their unique "self‐luminescence" characteristic and potential applications. In this review, we comb through and focus on current developments of lanthanide‐doped persistent luminescent scintillators (PersLSs), including their PersL mechanism, synthetic methods, tuning of PersL properties (e. g. emission wavelength, intensity, and duration time), as well as their promising applications (e. g. information storage, encryption, anti‐counterfeiting, bio‐imaging, and photodynamic therapy). We hope this review will provide valuable guidance for the future development of PersLSs. [ABSTRACT FROM AUTHOR]

High‐efficiency Cu(In,Ga)Se2 solar cells rely on Ga grading to mitigate back surface recombination. However, the inhomogeneous absorber has drawbacks, including increased non‐radiative loss and inadequate absorption. Therefore, literatures demand a paradigm shift of using a hole‐transport layer to passivate the back surface. Herein, a functional hole‐transport layer is demonstrated as an alternative to Ga grading. The novel hole‐transport layer is prepared as a double‐layer: co‐evaporated CuGaSe2 covered by solution combustion synthesis prepared In2O3. As demonstrated by micrographs, elemental mapping, and photoluminescence spectroscopy, the oxide layer improves thermal stability and prevents Ga diffusion. However, during the absorber deposition, a complete ion exchange of In and Ga converts CuGaSe2/In2O3 into CuInSe2/GaOx. Incorporating this hole‐transport layer in co‐evaporated nongraded CuInSe2 solar cells leads to significantly increased minority carrier lifetime from 5 to 113 ns, yielding an 80 meV improvement in quasi‐Fermi‐level splitting. The devices exhibit improved open‐circuit voltage, as well as a promising fill factor of over 71%, indicating good hole‐transport properties. In these results, the passivation effect and good hole‐transport properties of the hole‐transport layer are experimentally demonstrated. Thus, high‐efficiency solar cells can be achieved by using a functional hole‐transport layer without relying on Ga grading. [ABSTRACT FROM AUTHOR]

Transparent thin‐film piezoelectric transducers are attractive for haptic displays. However, for their widespread use in consumer electronics, innovative and cost‐effective processing methods need to be developed. In this contribution the effectiveness of the deposition of lead zirconate titanate thin films by inkjet printing for the fabrication of haptic devices is demonstrated. The 1,3‐propanediol solvent is used to prepare effective inkjet‐printing inks from chemical solution deposition solutions. The printed thin‐film structures on fused silica glass substrates are 900 nm thick and strongly {100} oriented perovskite phase is detected in X‐ray diffraction patterns. To fabricate devices, interdigitated capacitors and SU‐8 insulation layers are deposited on top of the printed lead zirconate titanate. Dimensions of the final device are 15.7 × 3.4 mm2. A standing antisymmetric Lamb wave is observed at 63.3 kHz, with out‐of‐plane displacement reaching 2 µm at an applied voltage of 100 V. This value exceeds the limit at which the texture rendering function can be induced in the device. Good functional performance of the device is linked with good electromechanical properties of the printed piezoelectric, with permittivity ε ′ and piezoelectric coefficient e33,f values of 1000 and 7.7 C m−2, respectively, which are comparable to films prepared by standard spin‐coating process. [ABSTRACT FROM AUTHOR]

Abstract: Although significant progress has been made towards using ZnO nanofibers (NFs) in future high‐performance and low‐cost electronics, they still suffer from insufficient device performance caused by substantial surface roughness (i.e., irregularity) and granular structure of the obtained NFs. Here, a simple one‐step electrospinning process (i.e., without hot‐press) is presented to obtain controllable ZnO NF networks to achieve high‐performance, large‐scale, and low‐operating‐power thin‐film transistors. By precisely manipulating annealing temperature during NF fabrication, their crystallinity, grain size distribution, surface morphology, and corresponding device performance can be regulated reliably for enhanced transistor performances. For the optimal annealing temperature of 500 °C, the device exhibits impressive electrical characteristics, including a small positive threshold voltage (Vth) of ≈0.9 V, a low leakage current of ≈10−12 A, and a superior on/off current ratio of ≈106, corresponding to one of the best‐performed ZnO NF devices reported to date. When high‐κ AlOx thin films are employed as gate dielectrics, the source/drain voltage (VDS) can be substantially reduced by 10× to a range of only 0–3 V, along with a 10× improvement in mobility to a respectable value of 0.2 cm2 V−1 s−1. These results indicate the potential of these nanofibers for use in next‐generation low‐power devices. [ABSTRACT FROM AUTHOR]

Recently, III-V semiconductor nanowires (NWs) are widely investigated as field-effect transistors (FETs) for high-performance electronics, optoelectronic, and others; nevertheless, effective control in their device performances, especially the threshold voltage is still not well attained, which can potentially limit their practical uses for technological applications. This study reports a simple but highly reliable metal-oxide nanoparticle (NP) surface decoration approach onto the device channel in order to manipulate electrical characteristics of III-V NWFETs, such as the threshold voltage and transistor operation, through the manipulation of free electrons in the NW channel (i.e., InAs, InP, and In0.7Ga0.3As) via depositing various metal-oxide NPs with different work functions. Without any passivation layer, this decoration approach can yield the stable NW device characteristics in ambient. Notably, the versatility of our decoration scheme has also been illustrated through the realization of highperformance enhancement-mode InAs NW-paralleled-arrayed devices as well as the configuration of highly efficient InAs NW NMOS inverters, comprising of both depletion and enhancement mode devices. All these results further elucidate the technological potential of this decoration approach for future high-performance, low-power nanoelectronic device fabrication, and circuit integration. [ABSTRACT FROM AUTHOR]

Although In2O3 nanofibers (NFs) are considered as one of the fundamental building blocks for future electronics, the further development of these NFs devices is still seriously hindered by the large leakage current, low on/off current ratio (Ion/Ioff), and large negative threshold voltage (VTH) due to the excess carriers existed in the NFs. A simple one‐step electrospinning process is employed here to effectively control the carrier concentration of In2O3 NFs by selectively doping strontium (Sr) element to improve their electrical device performance. The optimal devices (3.6 mol% Sr doping concentration) can yield the high field‐effect mobility (μfe ≈ 3.67 cm2 V−1 s−1), superior Ion/Ioff ratio (≈108), and operation in the energy‐efficient enhancement‐mode. High‐κ Al2O3 thin films can also be employed as the gate dielectric to give the gate voltage greatly reduced by 10× (from 40 to 4 V) and the μfe substantially increased by 4.8× (to 17.2 cm2 V−1 s−1). The electrospun E‐mode Sr‐In2O3 NF field‐effect transistors (NFFETs) can as well be integrated into full swing of inverters with excellent performances, further elucidating the significant advance of this electrospinning technique toward practical applications for future low‐cost, energy‐efficient, large‐scale, and high‐performance electronics. High‐performance, low‐power, and enhancement‐mode Sr‐doped In2O2 nanofiber (NFs) transistors are demonstrated with impressive electrical characteristics, including a high mobility (3.67 cm2 V−1 s−1) and an impressive Ion/Ioff ratio (≈108). The device operation voltage can be decreased from 40 to 4 V by further employing high‐κ Al2O3 thin films as gate dielectrics, indicating the potency of these NFs for next‐generation electronics. [ABSTRACT FROM AUTHOR]

The article focuses on the improving performance of ZnO nanofibers (NFs) based thin-film transistors through electrospinning process. Topics discussed include manipulation of annealing temperature to achieve electrical properties, regulation of grain size distribution to reduce substantial surface roughness, and improving its crystallinity.