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The sinusoidal modulation per phase and vector modulation are the most commonly employed pulse-width modulation techniques in three-phase inverters. There exist different schemes based on the variable switching frequency technique such as the hysteresis and finite control set based on the model predictive control with constant sampling period. This study proposes an alternative scheme by implementing a finite-control-set for a three-phase voltage-fed inverter. Here, a model solution-based control scheme is utilised, which allows the usage of a single controller resulting from the system simplification. It is shown that the proposed scheme exhibits an improved dynamic response under load variations and allows an easy digital implementation, which is the indication of its potential application from a practical point of view. A complete analysis and discussion of the proposed scheme as well as implementation and experimental results are provided to illustrate its effectiveness. [ABSTRACT FROM AUTHOR]

Nowadays, the microprocessors family normally require for the input source not only low voltage but also high current. There exists an increasing necessity for developing new applied techniques on topologies and control strategies, which may be able to fulfil such requirements. Although a considerable amount of applications use the conventional buck converter for step-down for DC/DC conversion, when a high step-down conversion is required is a much better choice to implement the quadratic buck converter (QBC); however, the problem for obtaining a high step-down conversion at wide duty ratio still remains. This document proposes the delayed quadratic buck converter, which offers a very high-step-down dc-dc conversion with a wide duty cycle. The QBC is modified in its topology by adding an inductor, which allows us to obtain for the duty cycle a higher increment than this normally obtained by a quadratic one. Converter behaviour and analysis are illustrated. Experimental results are also shown for a conversion from 36 to 1.5 V and an output power of 20W. [ABSTRACT FROM AUTHOR]

Low voltage and high current are typical requirements for the input source of the new family of microprocessors; therefore there is the need to develop new topologies and control strategies that can meet such requirements. A narrow duty ratio has limited the application of the conventional buck converter for wider step-down DC--DC conversion. An interesting option is to consider the quadratic buck converter; however, there is still the problem to obtain a wider step-down conversion. In this study, a switched-capacitor quadratic buck converter is proposed such that a wider conversion ratio is obtained for lower-output voltages. The converter consists of a quadratic buck converter with an array of capacitors and diodes, also referred as a voltage multiplier. To illustrate the behaviour of the proposed converter, experimental results are shown for a conversion from 36 to 1.5 V and an output power of 30 W. The efficiency of the proposed converter can be effectively increased when soft-switching and synchronous rectification are implemented. [ABSTRACT FROM AUTHOR]

High boost converters, because of its ability of having high gain level, have become important in applications for energy generation known as renewable sources. High efficiency, few components and low voltage and current stress on switches are desired features in these kinds of converters. Double tapped boost converter with just a single switch is proposed in this study for high gain; two pairs of coupled magnetically coils are charged in parallel and discharged in series with the source, this let us to obtain not only a higher gain with very few components but also an acceptable efficiency. Not only analysis for the topology is shown, but also simulation and experimental results are presented in order to illustrate the system behaviour for an output power of 200 W. The system efficiency is closer to 90% at hard switching. [ABSTRACT FROM AUTHOR]